Searched refs:Hi (Results 1 - 25 of 65) sorted by relevance

123

/external/valgrind/main/none/tests/
H A Dpth_once.stdout.exp2 identify_yourself: Hi, I'm a thread
3 identify_yourself: Hi, I'm a thread
4 identify_yourself: Hi, I'm a thread
5 identify_yourself: Hi, I'm a thread
6 identify_yourself: Hi, I'm a thread
7 identify_yourself: Hi, I'm a thread
8 identify_yourself: Hi, I'm a thread
9 identify_yourself: Hi, I'm a thread
10 identify_yourself: Hi, I'm a thread
11 identify_yourself: Hi,
[all...]
/external/valgrind/main/drd/tests/
H A Dtc21_pthonce.stdout.exp3 child: Hi, I'm thread 0
4 child: Hi, I'm thread 1
/external/valgrind/main/helgrind/tests/
H A Dtc21_pthonce.stdout.exp3 child: Hi, I'm thread 0
4 child: Hi, I'm thread 1
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.h163 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
172 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
174 SDValue &Lo, SDValue &Hi);
297 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi.
300 /// Op, and Hi being equal to the upper 32 bits.
301 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
302 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
307 SDValue &Lo, SDValue &Hi);
308 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
309 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
701 GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) argument
730 GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) argument
[all...]
H A DLegalizeTypesGeneric.cpp14 // computation in two identical registers of a smaller type. The Lo/Hi part
32 // These routines assume that the Lo/Hi part is stored first in memory on
33 // little/big-endian machines, followed by the Hi/Lo part. This means that
36 SDValue &Lo, SDValue &Hi) {
38 GetExpandedOp(Op, Lo, Hi);
41 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { argument
55 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi); local
57 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
62 GetExpandedOp(InOp, Lo, Hi);
35 ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) argument
186 ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
193 ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
205 ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
245 ExpandRes_NormalLoad(SDNode *N, SDValue &Lo, SDValue &Hi) argument
290 ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) argument
387 SDValue Lo, Hi; local
405 SDValue Lo, Hi; local
429 SDValue Lo, Hi; local
478 SDValue Lo, Hi; local
507 SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) argument
513 SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
535 SplitRes_SELECT_CC(SDNode *N, SDValue &Lo, SDValue &Hi) argument
548 SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) argument
[all...]
H A DLegalizeFloatTypes.cpp788 SDValue Lo, Hi; local
789 Lo = Hi = SDValue();
803 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
804 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
805 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
807 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
808 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break;
809 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
810 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
811 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); brea
848 SetExpandedFloat(SDValue(N, ResNo), Lo, Hi); local
851 ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
865 ExpandFloatRes_FABS(SDNode *N, SDValue &Lo, SDValue &Hi) argument
879 ExpandFloatRes_FADD(SDNode *N, SDValue &Lo, SDValue &Hi) argument
889 ExpandFloatRes_FCEIL(SDNode *N, SDValue &Lo, SDValue &Hi) argument
899 ExpandFloatRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi) argument
911 ExpandFloatRes_FCOS(SDNode *N, SDValue &Lo, SDValue &Hi) argument
921 ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo, SDValue &Hi) argument
935 ExpandFloatRes_FEXP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
945 ExpandFloatRes_FEXP2(SDNode *N, SDValue &Lo, SDValue &Hi) argument
955 ExpandFloatRes_FFLOOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
965 ExpandFloatRes_FLOG(SDNode *N, SDValue &Lo, SDValue &Hi) argument
975 ExpandFloatRes_FLOG2(SDNode *N, SDValue &Lo, SDValue &Hi) argument
985 ExpandFloatRes_FLOG10(SDNode *N, SDValue &Lo, SDValue &Hi) argument
995 ExpandFloatRes_FMA(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1009 ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1023 ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1035 ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1043 ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1051 ExpandFloatRes_FPOW(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1061 ExpandFloatRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1071 ExpandFloatRes_FREM(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1081 ExpandFloatRes_FRINT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1091 ExpandFloatRes_FROUND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1103 ExpandFloatRes_FSIN(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1113 ExpandFloatRes_FSQRT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1123 ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1137 ExpandFloatRes_FTRUNC(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1147 ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1179 ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1359 SDValue Lo, Hi; local
1370 SDValue Lo, Hi; local
1483 SDValue Lo, Hi; local
[all...]
H A DLegalizeIntegerTypes.cpp266 SDValue Lo, Hi; local
267 GetSplitVector(N->getOperand(0), Lo, Hi);
269 Hi = BitConvertToInteger(Hi);
272 std::swap(Lo, Hi);
277 JoinIntegers(Lo, Hi));
707 SDValue Hi = DAG.getNode(ISD::SRL, DL, Mul.getValueType(), Mul, local
709 Overflow = DAG.getSetCC(DL, N->getValueType(1), Hi,
710 DAG.getConstant(0, Hi.getValueType()), ISD::SETNE);
934 SDValue Hi local
1105 SDValue Lo, Hi; local
1143 case ISD::LOAD: ExpandIntRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); break; local
1220 SetExpandedInteger(SDValue(N, ResNo), Lo, Hi); local
1319 ExpandShiftByConstant(SDNode *N, unsigned Amt, SDValue &Lo, SDValue &Hi) argument
1412 ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1500 ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1574 ExpandIntRes_ADDSUB(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1636 ExpandIntRes_ADDSUBC(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1662 ExpandIntRes_ADDSUBE(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1682 ExpandIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) argument
1688 ExpandIntRes_ANY_EXTEND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1711 ExpandIntRes_AssertSext(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1732 ExpandIntRes_AssertZext(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1752 ExpandIntRes_BSWAP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1760 ExpandIntRes_Constant(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1773 ExpandIntRes_CTLZ(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1792 ExpandIntRes_CTPOP(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1803 ExpandIntRes_CTTZ(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1822 ExpandIntRes_FP_TO_SINT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1834 ExpandIntRes_FP_TO_UINT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1846 ExpandIntRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi) argument
1963 ExpandIntRes_Logical(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1973 ExpandIntRes_MUL(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2004 ExpandIntRes_SADDSUBO(SDNode *Node, SDValue &Lo, SDValue &Hi) argument
2046 ExpandIntRes_SDIV(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2066 ExpandIntRes_Shift(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2167 ExpandIntRes_SIGN_EXTEND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2199 ExpandIntRes_SIGN_EXTEND_INREG(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2225 ExpandIntRes_SREM(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2245 ExpandIntRes_TRUNCATE(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2256 ExpandIntRes_UADDSUBO(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2279 ExpandIntRes_XMULO(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2365 ExpandIntRes_UDIV(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2385 ExpandIntRes_UREM(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2405 ExpandIntRes_ZERO_EXTEND(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2433 ExpandIntRes_ATOMIC_LOAD(SDNode *N, SDValue &Lo, SDValue &Hi) argument
2677 SDValue Lo, Hi; local
2686 SDValue Lo, Hi; local
2716 SDValue Lo, Hi; local
2829 SDValue Lo, Hi; local
[all...]
H A DLegalizeVectorTypes.cpp543 SDValue Lo, Hi; local
559 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
561 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
562 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
563 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
564 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
565 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
566 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
567 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
568 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); brea
575 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); local
581 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi); local
652 SetSplitVector(SDValue(N, ResNo), Lo, Hi); local
655 SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
667 SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
683 SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) argument
731 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi); local
739 SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
752 SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi) argument
773 SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
789 SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
826 SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi) argument
834 SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
850 SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi) argument
901 SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi) argument
910 SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, SDValue &Hi) argument
953 SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) argument
971 SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1007 SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi) argument
1059 SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo, SDValue &Hi) argument
1255 SDValue Lo, Hi; local
1280 SDValue Lo, Hi; local
1298 SDValue Lo, Hi; local
1315 SDValue Lo, Hi; local
1378 SDValue Lo, Hi; local
1511 SDValue Lo, Hi; local
[all...]
H A DLegalizeTypes.cpp771 SDValue &Hi) {
777 Hi = Entry.second;
781 SDValue Hi) {
784 Hi.getValueType() == Lo.getValueType() &&
786 // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
788 AnalyzeNewValue(Hi);
794 Entry.second = Hi;
798 SDValue &Hi) {
804 Hi = Entry.second;
808 SDValue Hi) {
770 GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi) argument
780 SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi) argument
797 GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi) argument
807 SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi) argument
824 GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi) argument
834 SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi) argument
965 GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi) argument
990 JoinIntegers(SDValue Lo, SDValue Hi) argument
1080 SplitInteger(SDValue Op, EVT LoVT, EVT HiVT, SDValue &Lo, SDValue &Hi) argument
1094 SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi) argument
[all...]
H A DLegalizeDAG.cpp406 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); local
410 Store1 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Lo:Hi, Ptr,
417 Store2 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Hi:Lo, Ptr,
537 SDValue Lo, Hi; local
544 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr,
550 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(),
564 TLI.getShiftAmountTy(Hi.getValueType()));
565 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount);
569 Hi.getValue(1));
689 SDValue Hi local
[all...]
H A DLegalizeVectorOps.cpp515 SDValue Lo, Hi, ShAmt; local
530 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt);
531 Hi = DAG.getNode(ISD::AND, dl, WideVT, Hi, SrcEltBitMask);
535 if (Hi.getNode())
536 Lo = DAG.getNode(ISD::OR, dl, WideVT, Lo, Hi);
/external/llvm/include/llvm/Support/
H A DSwapByteOrder.h33 uint16_t Hi = value << 8;
35 return Hi | Lo;
65 uint64_t Hi = SwapByteOrder_32(uint32_t(value));
67 return (Hi << 32) | Lo;
H A DGCOV.h202 uint32_t Lo, Hi; local
203 if (!readInt(Lo) || !readInt(Hi)) return false;
204 Val = ((uint64_t)Hi << 32) | Lo;
/external/llvm/lib/Target/Mips/
H A DMipsJITInfo.cpp177 int Hi = ((unsigned)NewVal & 0xffff0000) >> 16; local
179 Hi++;
182 *(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi;
217 int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16; local
219 Hi++;
227 JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi);
232 JCE.emitWordBE(0xf << 26 | 25 << 16 | Hi);
H A DMipsISelLowering.h40 // No relation with Mips Hi register
41 Hi, enumerator in enum:llvm::MipsISD::NodeType
307 SDValue Hi = DAG.getNode(MipsISD::Hi, DL, Ty, local
309 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty));
310 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi,
323 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI); local
326 DAG.getNode(MipsISD::Hi, DL, Ty, Hi),
[all...]
H A DMips16ISelDAGToDAG.cpp48 SDNode *Lo = nullptr, *Hi = nullptr; local
60 Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
62 return std::make_pair(Lo, Hi);
H A DMipsFastISel.cpp383 unsigned Hi = (Imm >> 16) & 0xFFFF; local
385 // Both Lo and Hi have nonzero bits.
387 EmitInst(Mips::LUi, TmpReg).addImm(Hi);
390 EmitInst(Mips::LUi, ResultReg).addImm(Hi);
/external/chromium_org/third_party/webrtc/common_audio/signal_processing/
H A Dspl_sqrt_floor_arm.S9 @ Hi Kevin,
20 @ Hi Wilco,
/external/llvm/include/llvm/IR/
H A DMDBuilder.h62 /// \brief Return metadata describing the range [Lo, Hi).
63 MDNode *createRange(const APInt &Lo, const APInt &Hi);
/external/llvm/lib/IR/
H A DMDBuilder.cpp51 MDNode *MDBuilder::createRange(const APInt &Lo, const APInt &Hi) { argument
52 assert(Lo.getBitWidth() == Hi.getBitWidth() && "Mismatched bitwidths!");
54 if (Hi == Lo)
57 // Return the range [Lo, Hi).
59 Value *Range[2] = {ConstantInt::get(Ty, Lo), ConstantInt::get(Ty, Hi)};
/external/openssl/crypto/modes/asm/
H A Dghash-ia64.pl58 { .mfi; (p18) ld8 Hlo=[Hi[1]],-8
62 { .mfi; (p18) ld8 Hhi=[Hi[1]]
65 (p18) and Hi[1]=mask0xf0,xi[2] };;
70 (p18) add Hi[1]=Htbl,Hi[1] };;
72 { .mfi; (p18) ld8 Hlo=[Hi[1]],-8
74 { .mfi; (p17) shladd Hi[0]=xi[1],4,r0
76 { .mfi; (p18) ld8 Hhi=[Hi[1]]
79 (p17) and Hi[0]=mask0xf0,Hi[
[all...]
/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp569 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, local
572 SDValue Lo(Hi.getNode(), 1);
573 SDValue Ops[] = { Lo, Hi };
586 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, local
589 SDValue Lo(Hi.getNode(), 1);
590 SDValue Ops[] = { Lo, Hi };
683 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, local
686 SDValue Lo(Hi.getNode(), 1);
687 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
691 SDValue Hi local
702 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, local
746 SDValue Hi = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), local
1794 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, local
[all...]
/external/clang/lib/CodeGen/
H A DTargetInfo.cpp1216 /// Post merger cleanup, reduces a malformed Hi and Lo pair to
1225 /// \param Hi - The classification for the parts of the type
1228 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
1236 /// \param Hi - The classification for the parts of the type
1252 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
1254 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi,
1467 Class &Hi) const {
1489 if (Hi == Memory)
1491 if (Hi == X87Up && Lo != X87 && honorsRevision0_98())
1493 if (AggregateSize > 128 && (Lo != SSE || Hi !
1539 classify(QualType Ty, uint64_t OffsetBase, Class &Lo, Class &Hi, bool isNamedArg) const argument
[all...]
/external/llvm/include/llvm/CodeGen/
H A DAsmPrinter.h343 /// Emit something like ".long Hi-Lo" where the size in bytes of the directive
344 /// is specified by Size and Hi/Lo specify the labels. This implicitly uses
346 void EmitLabelDifference(const MCSymbol *Hi, const MCSymbol *Lo,
349 /// Emit something like ".long Hi+Offset-Lo" where the size in bytes of the
350 /// directive is specified by Size and Hi/Lo specify the labels. This
352 void EmitLabelOffsetDifference(const MCSymbol *Hi, uint64_t Offset,
/external/chromium_org/third_party/lcov/contrib/galaxy/
H A Dposterize.pl118 /Hi {newpath 4 copy 4 2 roll 8 7 roll M L L L Hi_Color setrgbcolor fill closepath} bind def
242 (Hi Coverage) 1 19 Hi_Color key % blue

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