| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 692 EVT InVT = InOp.getValueType(); local
695 switch (getTypeAction(InVT)) {
980 EVT InVT = N->getOperand(0).getValueType(); local
981 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector)
1283 EVT InVT = Lo.getValueType(); local
1286 InVT.getVectorNumElements());
1451 EVT InVT = InVec->getValueType(0); local
1458 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits();
1514 EVT InVT = Lo.getValueType(); local
1517 InVT
1816 EVT InVT = InOp.getValueType(); local
1937 EVT InVT = InOp.getValueType(); local
2038 EVT InVT = N->getOperand(0).getValueType(); local
2115 EVT InVT = InOp.getValueType(); local
2195 EVT InVT = InOp.getValueType(); local
2357 EVT InVT = InOp1.getValueType(); local
2453 EVT InVT = InOp.getValueType(); local
2509 EVT InVT = InOp.getValueType(); local
2555 EVT InVT = N->getOperand(0).getValueType(); local
3050 EVT InVT = InOp.getValueType(); local
[all...] |
| H A D | LegalizeTypesGeneric.cpp | 45 EVT InVT = InOp.getValueType(); local
49 switch (getTypeAction(InVT)) {
63 if (TLI.hasBigEndianPartOrdering(InVT) !=
83 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
86 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT);
96 if (InVT.isVector() && OutVT.isInteger()) {
158 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment);
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| H A D | LegalizeIntegerTypes.cpp | 237 EVT InVT = InOp.getValueType(); local
238 EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT);
243 switch (getTypeAction(InVT)) {
627 EVT InVT = InOp.getValueType(); local
628 assert(InVT.isVector() && "Cannot split scalar types");
629 unsigned NumElts = InVT.getVectorNumElements();
2884 EVT InVT = InOp0.getValueType(); local
2903 InVT.getVectorElementType(), N->getOperand(0), Index);
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| H A D | SelectionDAG.cpp | 2166 EVT InVT = Op.getOperand(0).getValueType(); local
2167 unsigned InBits = InVT.getScalarType().getSizeInBits();
2178 EVT InVT = Op.getOperand(0).getValueType(); local
2179 unsigned InBits = InVT.getScalarType().getSizeInBits();
2201 EVT InVT = Op.getOperand(0).getValueType(); local
2202 unsigned InBits = InVT.getScalarType().getSizeInBits();
2211 EVT InVT = Op.getOperand(0).getValueType(); local
2212 unsigned InBits = InVT.getScalarType().getSizeInBits();
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| H A D | TargetLowering.cpp | 902 EVT InVT = Op.getOperand(0).getValueType(); local
903 unsigned InBits = InVT.getScalarType().getSizeInBits();
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| H A D | DAGCombiner.cpp | 10169 EVT InVT = In.getOperand(0).getValueType();
10174 SrcVT = InVT;
10175 if (SrcVT != InVT)
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| /external/llvm/utils/TableGen/ |
| H A D | CodeGenDAGPatterns.cpp | 165 bool EEVT::TypeSet::MergeInTypeInfo(const EEVT::TypeSet &InVT, TreePattern &TP){ argument
166 if (InVT.isCompletelyUnknown() || *this == InVT || TP.hasError())
170 *this = InVT;
174 assert(TypeVec.size() >= 1 && InVT.TypeVec.size() >= 1 && "No unknowns");
181 if (InVT.hasIntegerTypes()) {
182 EEVT::TypeSet InCopy(InVT);
188 TypeVec[0] = InVT.TypeVec[0];
201 if ((InVT.TypeVec[0] == MVT::iPTR || InVT
[all...] |
| H A D | CodeGenDAGPatterns.h | 113 bool MergeInTypeInfo(const EEVT::TypeSet &InVT, TreePattern &TP);
115 bool MergeInTypeInfo(MVT::SimpleValueType InVT, TreePattern &TP) {
116 return MergeInTypeInfo(EEVT::TypeSet(InVT, TP), TP);
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 1249 EVT InVT = N->getOperand(0).getValueType(); local
1250 assert((InVT == MVT::i64 || InVT == MVT::i32) &&
1253 unsigned Opcode = (InVT == MVT::i64) ? PPC::ANDIo8 : PPC::ANDIo;
1254 SDValue AndI(CurDAG->getMachineNode(Opcode, dl, InVT, MVT::Glue,
1256 CurDAG->getTargetConstant(1, InVT)), 0);
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 10086 MVT InVT = In.getSimpleValueType();
10090 (InVT.is256BitVector() || InVT.is512BitVector()) &&
10094 if (ResVT.is256BitVector() && InVT.is512BitVector() &&
11076 MVT InVT = In.getSimpleValueType();
11092 if (((VT != MVT::v16i16) || (InVT != MVT::v16i8)) &&
11093 ((VT != MVT::v8i32) || (InVT != MVT::v8i16)) &&
11094 ((VT != MVT::v4i64) || (InVT != MVT::v4i32)))
11100 SDValue ZeroVec = getZeroVector(InVT, Subtarget, DAG, dl);
11101 SDValue Undef = DAG.getUNDEF(InVT);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1389 EVT InVT = Op.getOperand(0).getValueType(); local
1392 if (VT.getSizeInBits() < InVT.getSizeInBits()) {
1395 DAG.getNode(Op.getOpcode(), dl, InVT.changeVectorElementTypeToInteger(),
1400 if (VT.getSizeInBits() > InVT.getSizeInBits()) {
1441 EVT InVT = In.getValueType(); local
1443 if (VT.getSizeInBits() < InVT.getSizeInBits()) {
1445 MVT::getVectorVT(MVT::getFloatingPointVT(InVT.getScalarSizeInBits()),
1446 InVT.getVectorNumElements());
1451 if (VT.getSizeInBits() > InVT.getSizeInBits()) {
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| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1915 EVT InVT = In.getValueType(); local
1918 if (InVT == MVT::i32 && ResVT == MVT::f32) {
1934 if (InVT == MVT::f32 && ResVT == MVT::i32) {
|