Searched refs:Ins (Results 1 - 25 of 62) sorted by relevance

123

/external/chromium_org/third_party/yasm/source/patched-yasm/tools/re2c/
H A Dins.h15 typedef union Ins { union
26 } Ins; typedef in typeref:union:Ins
28 static int isMarked(Ins *i){
32 static void mark(Ins *i){
36 static void unmark(Ins *i){
H A Ddfa.h62 Ins **kernel;
89 DFA *DFA_new(Ins*, unsigned int, unsigned int, unsigned int, Char*);
92 State *DFA_findState(DFA*, Ins**, unsigned int);
H A Dactions.c31 void showIns(FILE *o, const Ins *i, const Ins *base){
37 for(const Ins *j = &(&i)[1]; j < (Ins*) i.i.link; ++j)
41 o << "goto " << ((Ins*) i.i.link - &base);
44 o << "fork " << ((Ins*) i.i.link - &base);
147 MatchOp_compile(RegExp *re, Char *rep, Ins *i)
149 Ins *j;
170 AltOp_compile(RegExp *re, Char *rep, Ins *i){
171 Ins *
[all...]
H A Dre.h90 Ins *ins;
119 void RegExp_compile(RegExp*, Char*, Ins*);
/external/llvm/lib/CodeGen/
H A DCallingConvLower.cpp67 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, argument
69 unsigned NumArgs = Ins.size();
72 MVT ArgVT = Ins[i].VT;
73 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
155 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument
157 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
158 MVT VT = Ins[i].VT;
159 ISD::ArgFlagsTy Flags = Ins[i].Flags;
/external/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.cpp67 &Ins,
70 unsigned NumArgs = Ins.size();
81 EVT ArgVT = Ins[i].VT;
82 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
180 Hexagon_CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument
184 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
185 EVT VT = Ins[i].VT;
66 AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, Hexagon_CCAssignFn Fn, unsigned SretValueInRegs) argument
H A DHexagonCallingConvLower.h78 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
100 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
H A DHexagonISelLowering.h92 const SmallVectorImpl<ISD::InputArg> &Ins,
110 const SmallVectorImpl<ISD::InputArg> &Ins,
121 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h131 const SmallVectorImpl<ISD::InputArg> &Ins,
138 const SmallVectorImpl<ISD::InputArg> &Ins,
145 const SmallVectorImpl<ISD::InputArg> &Ins,
152 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DMSP430ISelLowering.cpp272 const SmallVectorImpl<ISD::InputArg> &Ins) {
273 State.AnalyzeFormalArguments(Ins, CC_MSP430_AssignStack);
347 const SmallVectorImpl<ISD::InputArg> &Ins) {
348 State.AnalyzeCallResult(Ins, RetCC_MSP430);
372 &Ins,
383 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals);
385 if (Ins.empty())
398 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; local
414 Outs, OutVals, Ins, d
271 AnalyzeVarArgs(CCState &State, const SmallVectorImpl<ISD::InputArg> &Ins) argument
346 AnalyzeRetResult(CCState &State, const SmallVectorImpl<ISD::InputArg> &Ins) argument
368 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
424 LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
575 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
714 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
[all...]
/external/llvm/lib/Transforms/IPO/
H A DPartialInlining.cpp94 BasicBlock::iterator Ins = newReturnBlock->begin(); local
99 PHINode* retPhi = PHINode::Create(OldPhi->getType(), 2, "", Ins);
101 Ins = newReturnBlock->getFirstNonPHI();
H A DIPConstantPropagation.cpp250 Instruction *Ins = cast<Instruction>(*I); local
257 if (ExtractValueInst *EV = dyn_cast<ExtractValueInst>(Ins))
270 Ins->replaceAllUsesWith(New);
271 Ins->eraseFromParent();
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h521 const SmallVectorImpl<ISD::InputArg> &Ins,
571 const SmallVectorImpl<ISD::InputArg> &Ins,
582 const SmallVectorImpl<ISD::InputArg> &Ins,
588 const SmallVectorImpl<ISD::InputArg> &Ins,
616 const SmallVectorImpl<ISD::InputArg> &Ins,
622 const SmallVectorImpl<ISD::InputArg> &Ins,
628 const SmallVectorImpl<ISD::InputArg> &Ins,
643 const SmallVectorImpl<ISD::InputArg> &Ins,
652 const SmallVectorImpl<ISD::InputArg> &Ins,
660 const SmallVectorImpl<ISD::InputArg> &Ins,
[all...]
/external/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.cpp289 MachineBasicBlock::iterator Ins = MBB->begin(); local
291 if (Ins != MBB->end())
292 DL = Ins->getDebugLoc();
300 BuildMI(*MBB, Ins, DL, MCID, BaseReg)
H A DAArch64ISelLowering.h341 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL,
350 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL,
359 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h96 const SmallVectorImpl<ISD::InputArg> &Ins,
102 const SmallVectorImpl<ISD::InputArg> &Ins,
108 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h133 const SmallVectorImpl<ISD::InputArg> &Ins,
141 const SmallVectorImpl<ISD::InputArg> &Ins,
195 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Target/R600/
H A DR600ISelLowering.h38 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DSIISelLowering.h62 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DAMDGPUISelLowering.h99 const SmallVectorImpl<ISD::InputArg> &Ins,
102 const SmallVectorImpl<ISD::InputArg> &Ins) const;
/external/llvm/utils/TableGen/
H A DCodeGenRegisters.h82 std::pair<CompMap::iterator, bool> Ins = local
93 return (Ins.second || Ins.first->second == B) ? nullptr
94 : Ins.first->second;
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.h104 Ins, enumerator in enum:llvm::MipsISD::NodeType
364 void analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
368 void analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
466 const SmallVectorImpl<ISD::InputArg> &Ins,
529 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp75 /// same number of types as the Ins/Outs arrays in LowerFormalArguments,
657 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; local
967 if (Ins.size() > 0) {
1020 Chain, DAG.getConstant((Ins.size() == 0) ? 0 : 1, MVT::i32), InFlag
1066 if (Ins.size() > 0) {
1197 assert(VTs.size() == Ins.size() && "Bad value decomposition");
1199 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
1220 LoadRetVTs.push_back(Ins[i].VT);
1237 Ret0 = DAG.getNode(ISD::TRUNCATE, dl, Ins[
1626 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
[all...]
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.h46 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp587 MachineBasicBlock::iterator Ins = MBB->begin(); local
589 if (Ins != MBB->end())
590 DL = Ins->getDebugLoc();
598 MachineInstrBuilder MIB = AddDefaultPred(BuildMI(*MBB, Ins, DL, MCID, BaseReg)

Completed in 2644 milliseconds

123