Searched refs:Insn (Results 1 - 25 of 37) sorted by relevance

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/external/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp106 unsigned Insn,
111 unsigned Insn,
116 unsigned Insn,
121 unsigned Insn,
126 unsigned Insn,
131 unsigned Insn,
136 unsigned Insn,
141 unsigned Insn,
146 unsigned Insn,
151 unsigned Insn,
254 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) argument
272 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, unsigned &Op3) argument
288 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
358 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
371 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
384 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
397 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
411 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
424 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
437 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
451 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
522 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
536 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
550 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
563 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
576 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
589 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
602 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
616 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
631 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
645 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
659 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
679 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
693 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
713 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
732 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/external/dexmaker/src/dx/java/com/android/dx/rop/code/
H A DInsnList.java22 * List of {@link Insn} instances.
43 public Insn get(int n) {
44 return (Insn) get0(n);
53 public void set(int n, Insn insn) {
63 public Insn getLast() {
72 public void forEach(Insn.Visitor visitor) {
82 * The blocks must have the same number of insns, and each Insn must
83 * also return true to {@code Insn.contentEquals()}.
118 Insn one = (Insn) get
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H A DSwitchInsn.java28 extends Insn {
76 public Insn withAddedCatch(Type type) {
82 public Insn withRegisterOffset(int delta) {
96 public boolean contentEquals(Insn b) {
102 public Insn withNewRegisters(RegisterSpec result,
H A DCstInsn.java25 extends Insn {
66 public boolean contentEquals(Insn b) {
69 * Insn.contentEquals compares classes of this and b.
H A DFillArrayDataInsn.java31 extends Insn {
96 public Insn withAddedCatch(Type type) {
102 public Insn withRegisterOffset(int delta) {
110 public Insn withNewRegisters(RegisterSpec result,
H A DThrowingInsn.java29 extends Insn {
98 public Insn withAddedCatch(Type type) {
105 public Insn withRegisterOffset(int delta) {
113 public Insn withNewRegisters(RegisterSpec result,
H A DInsn.java30 public abstract class Insn implements ToHuman { class in inherits:ToHuman
51 public Insn(Rop opcode, SourcePosition position, RegisterSpec result, method in class:Insn
225 public abstract Insn withAddedCatch(Type type);
234 public abstract Insn withRegisterOffset(int delta);
245 public Insn withSourceLiteral() {
250 * Returns an exact copy of this Insn
254 public Insn copy() {
271 * Compares Insn contents, since {@code Insn.equals()} is defined
272 * to be an identity compare. Insn'
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H A DPlainCstInsn.java63 public Insn withAddedCatch(Type type) {
69 public Insn withRegisterOffset(int delta) {
78 public Insn withNewRegisters(RegisterSpec result,
H A DThrowingCstInsn.java83 public Insn withAddedCatch(Type type) {
91 public Insn withRegisterOffset(int delta) {
100 public Insn withNewRegisters(RegisterSpec result,
H A DBasicBlock.java86 Insn lastInsn = insns.get(sz - 1);
200 public Insn getFirstInsn() {
210 public Insn getLastInsn() {
235 Insn lastInsn = insns.getLast();
250 Insn lastInsn = insns.getLast();
H A DPlainInsn.java31 extends Insn {
85 public Insn withAddedCatch(Type type) {
91 public Insn withRegisterOffset(int delta) {
99 public Insn withSourceLiteral() {
149 public Insn withNewRegisters(RegisterSpec result,
H A DLocalVariableInfo.java48 private final HashMap<Insn, RegisterSpec> insnAssignments;
67 new HashMap<Insn, RegisterSpec>(blocks.getInstructionCount());
190 public void addAssignment(Insn insn, RegisterSpec spec) {
211 public RegisterSpec getAssignment(Insn insn) {
H A DBasicBlockList.java138 Insn insn = insns.get(j);
173 public void forEachInsn(Insn.Visitor visitor) {
313 implements Insn.Visitor {
368 private void visit(Insn insn) {
H A DLocalVariableExtractor.java121 Insn insn = insns.get(i);
/external/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp197 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
199 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
202 unsigned Insn,
205 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
207 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn,
209 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
211 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
215 unsigned Insn,
218 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
220 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
1319 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1469 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1618 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1809 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1838 DecodeQADDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1861 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1952 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1999 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2041 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2065 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2092 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2165 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2192 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2235 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2509 DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2522 DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2537 DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2550 DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2560 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2831 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2878 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2926 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2961 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3016 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3061 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3104 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3140 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3263 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3334 DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
3398 DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
3463 DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
3502 DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
3650 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3737 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3748 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3773 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3784 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3836 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3852 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3982 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4003 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4028 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4053 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4081 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4106 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4131 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4198 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4264 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4331 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4395 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4465 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4529 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4610 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4682 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4708 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4734 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4754 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4791 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4825 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument
4851 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4878 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4908 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/external/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp56 CodeGenInstruction &Insn,
74 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, argument
93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
97 Insn.Operands[BaseIdx + i].Rec->getName() + "'");
101 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I)
103 OpsAdded += Insn.Operands[i].MINumOperands;
112 addDagOperandMapping(Rec, SubDag, Insn, OperandMap, BaseIdx + i);
140 CodeGenInstruction Insn(Operator);
142 if (Insn.isCodeGenOnly || Insn
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H A DFixedLenDecoderEmitter.cpp373 void insnWithID(insn_t &Insn, unsigned Opcode) const { argument
386 Insn.push_back(BIT_UNSET);
388 Insn.push_back(bitFromBits(Bits, i));
402 bool fieldFromInsn(uint64_t &Field, insn_t &Insn, unsigned StartBit,
433 const insn_t &Insn) const;
510 insn_t Insn; local
513 Owner->insnWithID(Insn, Owner->Opcodes[i]);
517 bool ok = Owner->fieldFromInsn(Field, Insn, StartBit, NumBits);
930 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn,
935 if (Insn[StartBi
[all...]
/external/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp126 unsigned Insn,
165 unsigned Insn,
225 unsigned Insn,
249 unsigned Insn,
254 unsigned Insn,
258 static DecodeStatus DecodeMSA128Mem(MCInst &Inst, unsigned Insn,
262 unsigned Insn,
267 unsigned Insn,
271 static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn,
276 unsigned Insn,
750 uint32_t Insn; local
818 uint32_t Insn; local
962 DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
984 DecodeMSA128Mem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1030 DecodeMemMMImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1051 DecodeMemMMImm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1069 DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1087 DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1250 DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1289 DecodeJumpTargetMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1298 DecodeSimm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1306 DecodeLSAImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1315 DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1326 DecodeExtSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1335 DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1341 DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/external/dexmaker/src/dx/java/com/android/dx/ssa/
H A DSsaInsn.java55 public static SsaInsn makeFromRop(Insn insn, SsaBasicBlock block) {
70 * Like {@link com.android.dx.rop.code.Insn getResult()}.
92 * Like {@link com.android.dx.rop.code.Insn getSources()}.
184 abstract public Insn getOriginalRopInsn();
192 * @see com.android.dx.rop.code.Insn#getLocalAssignment()
223 public abstract Insn toRopInsn();
H A DNormalSsaInsn.java26 private Insn insn;
34 NormalSsaInsn(final Insn insn, final SsaBasicBlock block) {
104 * Like rop.Insn.getSources().
120 public Insn toRopInsn() {
134 public Insn getOriginalRopInsn() {
166 * @see Insn#withSourceLiteral
H A DLiteralOpUpgrader.java22 import com.android.dx.rop.code.Insn;
96 Insn originalRopInsn = insn.getOriginalRopInsn();
147 Insn originalRopInsn = insn.getOriginalRopInsn();
189 Insn originalRopInsn = insn.getOriginalRopInsn();
191 Insn newRopInsn;
H A DPhiInsn.java183 public Insn getOriginalRopInsn() {
283 public Insn toRopInsn() {
/external/dexmaker/src/main/java/com/google/dexmaker/
H A DLabel.java20 import com.android.dx.rop.code.Insn;
32 final List<Insn> instructions = new ArrayList<Insn>();
/external/dexmaker/src/dx/java/com/android/dx/dex/code/
H A DBlockAddresses.java21 import com.android.dx.rop.code.Insn;
133 Insn insn = one.getInsns().get(0);
H A DRopTranslator.java24 import com.android.dx.rop.code.Insn;
189 method.getBlocks().forEachInsn(new Insn.BaseVisitor() {
271 Insn lastInsn = block.getLastInsn();
453 private static RegisterSpecList getRegs(Insn insn) {
467 private static RegisterSpecList getRegs(Insn insn,
495 private class TranslationVisitor implements Insn.Visitor {
675 Insn insn
714 "Insn with result/move-result-pseudo mismatch " +
753 "Insn with result/move-result-pseudo mismatch" + insn);
871 public void addIntroductionIfNecessary(Insn ins
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