/external/valgrind/main/none/tests/mips64/ |
H A D | branch_and_jump_instructions.stdout.exp | 259 B BAL JR :: 0x6, RSval: 0x0 260 B BAL JR :: 0x6, RSval: 0x0 261 B BAL JR :: 0x9823b74, RSval: 0x9823b6e 262 B BAL JR :: 0xd4326df, RSval: 0xd4326d9 263 B BAL JR :: 0x130476e2, RSval: 0x130476dc 264 B BAL JR :: 0x17c56b71, RSval: 0x17c56b6b 265 B BAL JR :: 0x1a864db8, RSval: 0x1a864db2 266 B BAL JR :: 0x1e47500b, RSval: 0x1e475005 267 B BAL JR :: 0x2608edbe, RSval: 0x2608edb8 268 B BAL JR [all...] |
H A D | branches.stdout.exp | 52 B BAL JR :: 6, RSval: 0 53 B BAL JR :: 7, RSval: 1 54 B BAL JR :: 8, RSval: 2 55 B BAL JR :: 9, RSval: 3 56 B BAL JR :: 10, RSval: 4 57 B BAL JR :: 11, RSval: 5 58 B BAL JR :: 12, RSval: 6 59 B BAL JR :: 13, RSval: 7 60 B BAL JR :: 14, RSval: 8 61 B BAL JR [all...] |
/external/valgrind/main/none/tests/mips32/ |
H A D | branches.stdout.exp | 52 B BAL JR :: 6, RSval: 0 53 B BAL JR :: 7, RSval: 1 54 B BAL JR :: 8, RSval: 2 55 B BAL JR :: 9, RSval: 3 56 B BAL JR :: 10, RSval: 4 57 B BAL JR :: 11, RSval: 5 58 B BAL JR :: 12, RSval: 6 59 B BAL JR :: 13, RSval: 7 60 B BAL JR :: 14, RSval: 8 61 B BAL JR [all...] |
/external/oprofile/events/mips/20K/ |
H A D | events | 18 event:0xc counters:0 um:zero minimum:500 name:RPS_MISSPREDICTS : JR instructions that mispredicted using the Return Prediction Stack (RPS) 19 event:0xd counters:0 um:zero minimum:500 name:JR_INSNS_COMPLETED : JR instruction that completed execution
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/external/chromium_org/v8/src/mips/ |
H A D | constants-mips.cc | 158 case JR: 221 case JR:
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H A D | constants-mips.h | 380 JR = ((1 << 3) + 0),
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H A D | assembler-mips.cc | 540 ((function_field == JALR) || (rd_field == 0 && (function_field == JR)))); 558 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR; 1411 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR); 2653 // Try to convert JR to J, skip returns (jr ra). 2676 // Trying patch J, but out of range, just go back to JR. 2677 // JR 'rs' reg is the 'rt' reg specified in the ORI instruction (instr2). 2682 *(p + 2) = SPECIAL | rs_field | JR; 2721 *(p + 2) = SPECIAL | rs_field | JR;
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H A D | simulator-mips.cc | 1920 case JR: 2492 case JR: {
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/external/chromium_org/v8/src/mips64/ |
H A D | constants-mips64.cc | 158 case JR: 221 case JR:
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H A D | constants-mips64.h | 357 JR = ((1 << 3) + 0),
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H A D | assembler-mips64.cc | 518 ((function_field == JALR) || (rd_field == 0 && (function_field == JR)))); 535 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR; 1390 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR); 2907 *(p+6) = SPECIAL | rs_field | JR;
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H A D | simulator-mips64.cc | 1991 case JR: 2613 case JR: {
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/external/llvm/lib/ExecutionEngine/JIT/ |
H A D | JITEmitter.cpp | 615 JITResolver *JR = StubToResolverMap->getResolverFromStub(Stub); local 616 assert(JR && "Unable to find the corresponding JITResolver to the call site"); 625 MutexGuard locked(JR->TheJIT->lock); 630 JR->state.LookupFunctionFromCallSite(Stub); 636 void *Result = JR->TheJIT->getPointerToGlobalIfAvailable(F); 642 if (!JR->TheJIT->isCompilingLazily()) { 653 Result = JR->TheJIT->getPointerToFunction(F); 657 MutexGuard locked(JR->TheJIT->lock); 672 if(JR->revGOTMap.find(Stub) != JR [all...] |
/external/oprofile/events/mips/25K/ |
H A D | events | 29 event:0xf counters:0,1 um:zero minimum:500 name:JR_RPD_MISSPREDICTED : JR instructions that mispredicted using the Return Prediction Stack 30 event:0x10 counters:0,1 um:zero minimum:500 name:JR_COMPLETED : JR instruction that completed execution
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/external/oprofile/events/mips/24K/ |
H A D | events | 22 event:0x3 counters:0 um:zero minimum:500 name:JR_31_INSNS : 3-0 JR $31 (return) instructions executed 23 event:0x4 counters:0 um:zero minimum:500 name:JR_NON_31_INSNS : 4-0 JR $xx (not $31) instructions executed (at same cost as a mispredict) 87 event:0x403 counters:1 um:zero minimum:500 name:JR_31_MISPREDICTIONS : 3-1 JR $31 mispredictions 88 event:0x404 counters:1 um:zero minimum:500 name:JR_31_NO_PREDICTIONS : 4-1 JR $31 not predicted (stack mismatch).
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/external/oprofile/events/mips/34K/ |
H A D | events | 22 event:0x3 counters:0 um:zero minimum:500 name:JR_31_INSNS : 3-0 JR $31 (return) instructions executed 23 event:0x4 counters:0 um:zero minimum:500 name:JR_NON_31_INSNS : 4-0 JR $xx (not $31) instructions executed (at same cost as a mispredict) 94 event:0x403 counters:1 um:zero minimum:500 name:JR_31_MISPREDICTIONS : 3-1 JR $31 mispredictions 95 event:0x404 counters:1 um:zero minimum:500 name:JR_31_NO_PREDICTIONS : 4-1 JR $31 not predicted (stack mismatch).
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/external/oprofile/events/mips/1004K/ |
H A D | events | 22 event:0x3 counters:0 um:zero minimum:500 name:JR_31_INSNS : 3-0 JR $31 (return) instructions executed 23 event:0x4 counters:0 um:zero minimum:500 name:JR_NON_31_INSNS : 4-0 JR $xx (not $31) instructions executed (at same cost as a mispredict) 102 event:0x403 counters:1 um:zero minimum:500 name:JR_31_MISPREDICTIONS : 3-1 JR $31 mispredictions 103 event:0x404 counters:1 um:zero minimum:500 name:JR_31_NO_PREDICTIONS : 4-1 JR $31 not predicted (stack mismatch).
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsNaClELFStreamer.cpp | 52 // MIPS32r6/MIPS64r6 doesn't have a JR instruction and uses JALR instead. 57 return MI.getOpcode() == Mips::JR;
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/external/llvm/lib/Target/Mips/ |
H A D | MipsLongBranch.cpp | 332 .append(BuildMI(*MF, DL, TII->get(Mips::JR)).addReg(Mips::AT)) 341 .append(BuildMI(*MF, DL, TII->get(Mips::JR)).addReg(Mips::AT)) 344 // Bundle-align the target of indirect branch JR.
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H A D | MipsAsmPrinter.cpp | 94 // Lower PseudoReturn/PseudoIndirectBranch/PseudoIndirectBranch64 to JR, JR_MM, 113 // Everything else should use (JR $rs) 114 TmpInst0.setOpcode(Mips::JR); 957 EmitInstrReg(Mips::JR, Mips::S2);
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/external/oprofile/events/mips/74K/ |
H A D | events | 20 event:0x2 counters:0,2 um:zero minimum:500 name:PREDICTED_JR_31 : 2-0 JR $31 (return) instructions predicted including speculative instructions 21 event:0x3 counters:0,2 um:zero minimum:500 name:REDIRECT_STALLS : 3-0 Stall cycles due to register indirect jumps (including non-predicted JR $31), ERET/WAIT instructions, and IFU determined exception 96 event:0x402 counters:1,3 um:zero minimum:500 name:JR_31_MISPREDICTIONS : 2-1 JR $31 (return) instructions mispredicted 97 event:0x403 counters:1,3 um:zero minimum:500 name:JR_31_NO_PREDICTIONS : 3-1 JR $31 (return) instructions not predicted
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/external/pcre/dist/sljit/ |
H A D | sljitNativeMIPS_common.c | 143 #define JR (HI(0) | LO(8)) macro 666 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS)); 1582 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS)); 1714 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS)); 1861 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS)); 1943 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS)); 2009 FAIL_IF(push_inst(compiler, JR | S(src_r), UNMOVABLE_INS));
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H A D | sljitNativeTILEGX_64.c | 393 #define JR(reg) \ macro 1333 return JR(RA); 1633 return JR(RA);
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/external/chromium_org/third_party/libjingle/source/talk/media/testdata/ |
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