| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 222 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 | 0x8 }, // special c[] constraint
434 if (i->op == OP_MAD || i->op == OP_FMA) {
460 if ((op == OP_MAD || op == OP_FMA) && (ty != TYPE_F32))
520 return (insn->op == OP_ADD) || (insn->op == OP_MAD);
589 case OP_MAD:
621 case OP_MAD:
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| H A D | nv50_ir_emit_nvc0.cpp | 1617 case OP_MAD:
1773 if (i->predSrc >= 0 && i->op == OP_MAD)
|
| H A D | nv50_ir_lowering_nvc0.cpp | 489 if (i->op == OP_MAD)
|
| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 222 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 | 0x8 }, // special c[] constraint
434 if (i->op == OP_MAD || i->op == OP_FMA) {
460 if ((op == OP_MAD || op == OP_FMA) && (ty != TYPE_F32))
520 return (insn->op == OP_ADD) || (insn->op == OP_MAD);
589 case OP_MAD:
621 case OP_MAD:
|
| H A D | nv50_ir_emit_nvc0.cpp | 1617 case OP_MAD:
1773 if (i->predSrc >= 0 && i->op == OP_MAD)
|
| H A D | nv50_ir_lowering_nvc0.cpp | 489 if (i->op == OP_MAD)
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_lowering_nv50.cpp | 73 i[3] = bld->mkOp3(OP_MAD, fTy, t[1], a[1], b[0], t[0]);
75 i[4] = bld->mkOp3(OP_MAD, fTy, t[3], a[0], b[0], t[2]);
88 i[5] = bld->mkOp3(OP_MAD, fTy, mul->getDef(0), a[1], b[1], r[2]);
167 if (i->op == OP_MAD)
363 if (mul->op == OP_MAD) {
497 case OP_MAD:
|
| H A D | nv50_ir_from_sm4.cpp | 370 case SM4_OPCODE_DP2: return OP_MAD;
371 case SM4_OPCODE_DP3: return OP_MAD;
372 case SM4_OPCODE_DP4: return OP_MAD;
390 case SM4_OPCODE_IMAD: return OP_MAD;
404 case SM4_OPCODE_MAD: return OP_MAD;
435 case SM4_OPCODE_UMAD: return OP_MAD;
1644 mkOp3(OP_MAD, TYPE_F32, dotp, src(0, c), src(1, c), dotp);
1782 mkOp3(OP_MAD, dTy, dst0[c], src(0, c), src(1, c), src(2, c));
|
| H A D | nv50_ir_target_nv50.cpp | 90 { OP_MAD, 0x7, 0x0, 0x0, 0x0, 0x6, 0x1, 0x1, 0x0 }, // special constraint
315 if ((i->op == OP_MUL || i->op == OP_MAD) && !isFloatType(i->dType)) {
|
| H A D | nv50_ir_peephole.cpp | 398 case OP_MAD:
504 if (i->op == OP_MAD || i->op == OP_FMA) {
736 bld.mkOp3(OP_MAD, TYPE_S32, tA, i->getSrc(0), bld.loadImm(NULL, m),
987 if (!changed && prog->getTarget()->isOpSupported(OP_MAD, add->dType))
988 changed = tryADDToMADOrSAD(add, OP_MAD);
1004 const Modifier modBad = Modifier(~((toOp == OP_MAD) ? NV50_IR_MOD_NEG : 0));
|
| H A D | nv50_ir_from_tgsi.cpp | 1447 mkOp3(OP_MAD, TYPE_F32, dotp, src0, src1, dotp);
1923 mkOp3(OP_MAD, TYPE_F32, dst0[c],
1941 mkOp3(OP_MAD, TYPE_F32, dst0[c], src0, src1, val0);
2265 mkOp3(OP_MAD, TYPE_F32, res[i], clipVtx[c], ucp, res[i]);
|
| H A D | nv50_ir.h | 56 OP_MAD, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_emit_nv50.cpp | 1576 case OP_MAD:
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_lowering_nv50.cpp | 73 i[3] = bld->mkOp3(OP_MAD, fTy, t[1], a[1], b[0], t[0]);
75 i[4] = bld->mkOp3(OP_MAD, fTy, t[3], a[0], b[0], t[2]);
88 i[5] = bld->mkOp3(OP_MAD, fTy, mul->getDef(0), a[1], b[1], r[2]);
167 if (i->op == OP_MAD)
363 if (mul->op == OP_MAD) {
497 case OP_MAD:
|
| H A D | nv50_ir_from_sm4.cpp | 370 case SM4_OPCODE_DP2: return OP_MAD;
371 case SM4_OPCODE_DP3: return OP_MAD;
372 case SM4_OPCODE_DP4: return OP_MAD;
390 case SM4_OPCODE_IMAD: return OP_MAD;
404 case SM4_OPCODE_MAD: return OP_MAD;
435 case SM4_OPCODE_UMAD: return OP_MAD;
1644 mkOp3(OP_MAD, TYPE_F32, dotp, src(0, c), src(1, c), dotp);
1782 mkOp3(OP_MAD, dTy, dst0[c], src(0, c), src(1, c), src(2, c));
|
| H A D | nv50_ir_target_nv50.cpp | 90 { OP_MAD, 0x7, 0x0, 0x0, 0x0, 0x6, 0x1, 0x1, 0x0 }, // special constraint
315 if ((i->op == OP_MUL || i->op == OP_MAD) && !isFloatType(i->dType)) {
|
| H A D | nv50_ir_peephole.cpp | 398 case OP_MAD:
504 if (i->op == OP_MAD || i->op == OP_FMA) {
736 bld.mkOp3(OP_MAD, TYPE_S32, tA, i->getSrc(0), bld.loadImm(NULL, m),
987 if (!changed && prog->getTarget()->isOpSupported(OP_MAD, add->dType))
988 changed = tryADDToMADOrSAD(add, OP_MAD);
1004 const Modifier modBad = Modifier(~((toOp == OP_MAD) ? NV50_IR_MOD_NEG : 0));
|
| H A D | nv50_ir_from_tgsi.cpp | 1447 mkOp3(OP_MAD, TYPE_F32, dotp, src0, src1, dotp);
1923 mkOp3(OP_MAD, TYPE_F32, dst0[c],
1941 mkOp3(OP_MAD, TYPE_F32, dst0[c], src0, src1, val0);
2265 mkOp3(OP_MAD, TYPE_F32, res[i], clipVtx[c], ucp, res[i]);
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| H A D | nv50_ir.h | 56 OP_MAD, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_emit_nv50.cpp | 1576 case OP_MAD:
|