| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 221 { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
598 case OP_MIN:
629 case OP_MIN:
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| H A D | nv50_ir_emit_nvc0.cpp | 750 op = (i->op == OP_MIN) ? 0x080e000000000000ULL : 0x081e000000000000ULL;
1655 case OP_MIN:
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| H A D | nv50_ir_lowering_nvc0.cpp | 492 i->op == OP_CVT || i->op == OP_MIN || i->op == OP_MAX ||
|
| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 221 { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
598 case OP_MIN:
629 case OP_MIN:
|
| H A D | nv50_ir_emit_nvc0.cpp | 750 op = (i->op == OP_MIN) ? 0x080e000000000000ULL : 0x081e000000000000ULL;
1655 case OP_MIN:
|
| H A D | nv50_ir_lowering_nvc0.cpp | 492 i->op == OP_CVT || i->op == OP_MIN || i->op == OP_MAX ||
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_from_sm4.cpp | 392 case SM4_OPCODE_IMIN: return OP_MIN;
405 case SM4_OPCODE_MIN: return OP_MIN;
437 case SM4_OPCODE_UMIN: return OP_MIN;
471 case SM4_OPCODE_ATOMIC_IMIN: return OP_MIN;
473 case SM4_OPCODE_ATOMIC_UMIN: return OP_MIN;
478 case SM4_OPCODE_DMIN: return OP_MIN;
1330 res = mkOp2v(OP_MIN, TYPE_U32, res, res, loadImm(NULL, cnt - 1));
1404 if (op == OP_MIN || op == OP_MAX) {
1451 saveFragDepth(OP_MIN, value);
|
| H A D | nv50_ir_emit_nv50.cpp | 838 code[1] = (i->op == OP_MIN) ? 0xa0000000 : 0xc0000000;
842 if (i->op == OP_MIN)
1601 case OP_MIN:
|
| H A D | nv50_ir_target_nv50.cpp | 89 { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
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| H A D | nv50_ir_lowering_nv50.cpp | 170 i->op == OP_CVT || i->op == OP_MIN || i->op == OP_MAX ||
594 bld.mkOp2(OP_MIN, TYPE_U32, src, src, bld.loadImm(NULL, 511));
|
| H A D | nv50_ir_from_tgsi.cpp | 1383 mkOp2(OP_MIN, dstTy, val, val, mkImm(+1.0f));
1684 mkOp2(OP_MIN, TYPE_F32, val3, val3, pos128);
1993 mkOp2(OP_MIN, TYPE_F32, val0, src0, src1);
|
| H A D | nv50_ir.h | 68 OP_MIN, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_peephole.cpp | 456 case OP_MIN:
1227 case OP_MIN:
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_from_sm4.cpp | 392 case SM4_OPCODE_IMIN: return OP_MIN;
405 case SM4_OPCODE_MIN: return OP_MIN;
437 case SM4_OPCODE_UMIN: return OP_MIN;
471 case SM4_OPCODE_ATOMIC_IMIN: return OP_MIN;
473 case SM4_OPCODE_ATOMIC_UMIN: return OP_MIN;
478 case SM4_OPCODE_DMIN: return OP_MIN;
1330 res = mkOp2v(OP_MIN, TYPE_U32, res, res, loadImm(NULL, cnt - 1));
1404 if (op == OP_MIN || op == OP_MAX) {
1451 saveFragDepth(OP_MIN, value);
|
| H A D | nv50_ir_emit_nv50.cpp | 838 code[1] = (i->op == OP_MIN) ? 0xa0000000 : 0xc0000000;
842 if (i->op == OP_MIN)
1601 case OP_MIN:
|
| H A D | nv50_ir_target_nv50.cpp | 89 { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
|
| H A D | nv50_ir_lowering_nv50.cpp | 170 i->op == OP_CVT || i->op == OP_MIN || i->op == OP_MAX ||
594 bld.mkOp2(OP_MIN, TYPE_U32, src, src, bld.loadImm(NULL, 511));
|
| H A D | nv50_ir_from_tgsi.cpp | 1383 mkOp2(OP_MIN, dstTy, val, val, mkImm(+1.0f));
1684 mkOp2(OP_MIN, TYPE_F32, val3, val3, pos128);
1993 mkOp2(OP_MIN, TYPE_F32, val0, src0, src1);
|
| H A D | nv50_ir.h | 68 OP_MIN, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_peephole.cpp | 456 case OP_MIN:
1227 case OP_MIN:
|
| /external/tcpdump/ |
| H A D | print-forces.c | 1514 #define OP_MIN 12 macro
1532 if (dlen <= OP_MIN) { /* id, instance, oper tlv header .. */
1534 OP_MIN - dlen);
1539 * At this point, we know that dlen > OP_MIN; OP_OFF < OP_MIN, so
|