Searched refs:OP_PRECONT (Results 1 - 18 of 18) sorted by relevance
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_target_nv50.cpp | 126 OP_DISCARD, OP_CONT, OP_BREAK, OP_PRECONT, OP_PREBREAK, OP_PRERET,
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| H A D | nv50_ir.h | 98 OP_PRECONT, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_from_sm4.cpp | 402 case SM4_OPCODE_LOOP: return OP_PRECONT;
2044 mkFlow(OP_PRECONT, loopHeader, CC_ALWAYS, NULL);
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| H A D | nv50_ir_lowering_nv50.cpp | 1074 case OP_PRECONT:
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| H A D | nv50_ir_emit_nv50.cpp | 1710 case OP_PRECONT:
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| H A D | nv50_ir_from_tgsi.cpp | 2133 mkFlow(OP_PRECONT, lbgnBB, CC_ALWAYS, NULL);
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 275 OP_DISCARD, OP_CONT, OP_BREAK, OP_PRECONT, OP_PREBREAK, OP_PRERET,
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| H A D | nv50_ir_emit_nvc0.cpp | 1150 case OP_PRECONT: code[1] = 0x70000000; mask = 2; break;
1709 case OP_PRECONT:
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| H A D | nv50_ir_lowering_nvc0.cpp | 505 if (bb->cfg.incidentCount() != 2 || bb->getEntry()->op != OP_PRECONT)
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_target_nv50.cpp | 126 OP_DISCARD, OP_CONT, OP_BREAK, OP_PRECONT, OP_PREBREAK, OP_PRERET,
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| H A D | nv50_ir.h | 98 OP_PRECONT, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_from_sm4.cpp | 402 case SM4_OPCODE_LOOP: return OP_PRECONT;
2044 mkFlow(OP_PRECONT, loopHeader, CC_ALWAYS, NULL);
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| H A D | nv50_ir_lowering_nv50.cpp | 1074 case OP_PRECONT:
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| H A D | nv50_ir_emit_nv50.cpp | 1710 case OP_PRECONT:
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| H A D | nv50_ir_from_tgsi.cpp | 2133 mkFlow(OP_PRECONT, lbgnBB, CC_ALWAYS, NULL);
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| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 275 OP_DISCARD, OP_CONT, OP_BREAK, OP_PRECONT, OP_PREBREAK, OP_PRERET,
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| H A D | nv50_ir_emit_nvc0.cpp | 1150 case OP_PRECONT: code[1] = 0x70000000; mask = 2; break;
1709 case OP_PRECONT:
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| H A D | nv50_ir_lowering_nvc0.cpp | 505 if (bb->cfg.incidentCount() != 2 || bb->getEntry()->op != OP_PRECONT)
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