Searched refs:OP_SET_XOR (Results 1 - 10 of 10) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_target_nv50.cpp389 case OP_SET_XOR:
H A Dnv50_ir.h76 OP_SET_XOR, enumerator in enum:nv50_ir::operation
H A Dnv50_ir_peephole.cpp1138 logop->op == OP_XOR ? OP_SET_XOR : OP_SET_OR);
1144 set0->op != OP_SET_XOR)
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/
H A Dnv50_ir_target_nvc0.cpp250 { OP_SET_XOR, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
H A Dnv50_ir_emit_nvc0.cpp886 case OP_SET_XOR: hi = 0x10400000; break;
1646 case OP_SET_XOR:
/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_target_nv50.cpp389 case OP_SET_XOR:
H A Dnv50_ir.h76 OP_SET_XOR, enumerator in enum:nv50_ir::operation
H A Dnv50_ir_peephole.cpp1138 logop->op == OP_XOR ? OP_SET_XOR : OP_SET_OR);
1144 set0->op != OP_SET_XOR)
/external/mesa3d/src/gallium/drivers/nvc0/codegen/
H A Dnv50_ir_target_nvc0.cpp250 { OP_SET_XOR, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
H A Dnv50_ir_emit_nvc0.cpp886 case OP_SET_XOR: hi = 0x10400000; break;
1646 case OP_SET_XOR:

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