Searched refs:OP_SIN (Results 1 - 16 of 16) sorted by relevance
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 239 { OP_SIN, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
604 case OP_SIN:
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| H A D | nv50_ir_emit_nvc0.cpp | 1680 case OP_SIN:
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| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 239 { OP_SIN, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
604 case OP_SIN:
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| H A D | nv50_ir_emit_nvc0.cpp | 1680 case OP_SIN:
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_target_nv50.cpp | 493 case OP_SIN:
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| H A D | nv50_ir.h | 83 OP_SIN, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_peephole.cpp | 534 case OP_SIN: res.data.f32 = sinf(imm.reg.data.f32); break;
539 // these should be handled in subsequent OP_SIN/COS/EX2
814 case OP_SIN:
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| H A D | nv50_ir_emit_nv50.cpp | 1633 case OP_SIN:
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| H A D | nv50_ir_from_sm4.cpp | 1891 mkOp1(OP_SIN, TYPE_F32, dst0[c], val);
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| H A D | nv50_ir_from_tgsi.cpp | 1851 mkOp1(OP_SIN, TYPE_F32, dst0[1], val0);
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_target_nv50.cpp | 493 case OP_SIN:
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| H A D | nv50_ir.h | 83 OP_SIN, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_peephole.cpp | 534 case OP_SIN: res.data.f32 = sinf(imm.reg.data.f32); break;
539 // these should be handled in subsequent OP_SIN/COS/EX2
814 case OP_SIN:
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| H A D | nv50_ir_emit_nv50.cpp | 1633 case OP_SIN:
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| H A D | nv50_ir_from_sm4.cpp | 1891 mkOp1(OP_SIN, TYPE_F32, dst0[c], val);
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| H A D | nv50_ir_from_tgsi.cpp | 1851 mkOp1(OP_SIN, TYPE_F32, dst0[1], val0);
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Completed in 2465 milliseconds