Searched refs:OperIdx (Results 1 - 6 of 6) sorted by relevance

/external/llvm/include/llvm/CodeGen/
H A DScheduleDAGInstrs.h245 void addPhysRegDataDeps(SUnit *SU, unsigned OperIdx);
246 void addPhysRegDeps(SUnit *SU, unsigned OperIdx);
247 void addVRegDefDeps(SUnit *SU, unsigned OperIdx);
248 void addVRegUseDeps(SUnit *SU, unsigned OperIdx);
/external/llvm/lib/CodeGen/
H A DScheduleDAGInstrs.cpp252 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { argument
253 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx);
283 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse,
294 /// depend the physical register referenced at OperIdx.
295 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { argument
297 MachineOperand &MO = MI->getOperand(OperIdx);
322 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
334 Uses.insert(PhysRegSUOper(SU, OperIdx, MO.getReg()));
339 addPhysRegDataDeps(SU, OperIdx);
366 Defs.insert(PhysRegSUOper(SU, OperIdx, Re
376 addVRegDefDeps(SUnit *SU, unsigned OperIdx) argument
414 addVRegUseDeps(SUnit *SU, unsigned OperIdx) argument
[all...]
H A DStackMaps.cpp394 unsigned OperIdx = 0; local
416 DEBUG(dbgs() << WSMP << " Loc " << OperIdx << ": "; local
450 OperIdx++;
460 OperIdx = 0;
462 DEBUG(dbgs() << WSMP << " LO " << OperIdx << ": "
H A DTargetLoweringBase.cpp933 for(unsigned OperIdx = 0; OperIdx != MI->getNumOperands(); ++OperIdx) {
934 MachineOperand &MO = MI->getOperand(OperIdx);
944 for (unsigned i = 0; i < OperIdx; ++i)
948 MIB.addOperand(MI->getOperand(OperIdx));
951 for (unsigned i = OperIdx + 1; i != MI->getNumOperands(); ++i)
970 OperIdx += (MIB->getNumOperands() - MI->getNumOperands()) - 1;
/external/llvm/lib/Transforms/Utils/
H A DSimplifyIndVar.cpp99 unsigned OperIdx = 0; local
108 if (IVOperand != UseInst->getOperand(OperIdx) ||
145 UseInst->setOperand(OperIdx, IVSrc);
/external/llvm/utils/TableGen/
H A DCodeGenSchedule.cpp1173 unsigned OperIdx = RWSequences.size()-1;
1178 RWSequences.push_back(RWSequences[OperIdx]);
1185 RWI != RWE; ++RWI, ++OperIdx) {
1191 RWSequences[OperIdx].insert(RWSequences[OperIdx].end(),
1194 assert(OperIdx == RWSequences.size() && "missed a sequence");

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