Searched refs:PPC (Results 1 - 25 of 61) sorted by relevance

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/external/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCPredicates.cpp1 //===-- PPCPredicates.cpp - PPC Branch Predicate Information --------------===//
19 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) {
21 case PPC::PRED_EQ: return PPC::PRED_NE;
22 case PPC::PRED_NE: return PPC::PRED_EQ;
23 case PPC::PRED_LT: return PPC
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H A DPPCFixupKinds.h1 //===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
15 #undef PPC macro
18 namespace PPC { namespace in namespace:llvm
H A DPPCPredicates.h1 //===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
17 // GCC #defines PPC on Linux but we use it as our namespace name
18 #undef PPC macro
20 // Generated files will use "namespace PPC". To avoid symbol clash,
21 // undefine PPC here. PPC may be predefined on some hosts.
22 #undef PPC macro
25 namespace PPC { namespace in namespace:llvm
H A DPPCAsmBackend.cpp1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
33 case PPC::fixup_ppc_nofixup:
35 case PPC::fixup_ppc_brcond14:
36 case PPC::fixup_ppc_brcond14abs:
38 case PPC::fixup_ppc_br24:
39 case PPC::fixup_ppc_br24abs:
41 case PPC::fixup_ppc_half16:
43 case PPC::fixup_ppc_half16ds:
55 case PPC::fixup_ppc_half16:
56 case PPC
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H A DPPCMCCodeEmitter.cpp1 //===-- PPCMCCodeEmitter.cpp - Convert PPC code to machine code -----------===//
171 (MCFixupKind)PPC::fixup_ppc_br24));
183 (MCFixupKind)PPC::fixup_ppc_brcond14));
196 (MCFixupKind)PPC::fixup_ppc_br24abs));
209 (MCFixupKind)PPC::fixup_ppc_brcond14abs));
221 (MCFixupKind)PPC::fixup_ppc_half16));
239 (MCFixupKind)PPC::fixup_ppc_half16));
258 (MCFixupKind)PPC::fixup_ppc_half16ds));
273 (MCFixupKind)PPC::fixup_ppc_nofixup));
276 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC
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H A DPPCMCTargetDesc.h17 // GCC #defines PPC on Linux but we use it as our namespace name
18 #undef PPC macro
46 /// createPPCELFObjectWriter - Construct an PPC ELF object writer.
51 /// createPPCELFObjectWriter - Construct a PPC Mach-O object writer.
57 // Generated files will use "namespace PPC". To avoid symbol clash,
58 // undefine PPC here. PPC may be predefined on some hosts.
59 #undef PPC macro
H A DPPCELFObjectWriter.cpp1 //===-- PPCELFObjectWriter.cpp - PPC ELF Writer ---------------------------===//
84 case PPC::fixup_ppc_br24:
85 case PPC::fixup_ppc_br24abs:
88 case PPC::fixup_ppc_brcond14:
89 case PPC::fixup_ppc_brcond14abs:
92 case PPC::fixup_ppc_half16:
121 case PPC::fixup_ppc_br24abs:
124 case PPC::fixup_ppc_brcond14abs:
127 case PPC::fixup_ppc_half16:
284 case PPC
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/external/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp10 #include "PPC.h"
61 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
62 PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7
66 PPC
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/external/llvm/lib/Target/PowerPC/
H A DPPCRelocations.h1 //===-- PPCRelocations.h - PPC Code Relocations -----------------*- C++ -*-===//
19 // Hack to rid us of a PPC pre-processor symbol which is erroneously
20 // defined in a PowerPC header file (bug in Linux/PPC)
21 #ifdef PPC
22 #undef PPC macro
26 namespace PPC { namespace in namespace:llvm
H A DPPCRegisterInfo.cpp16 #include "PPC.h"
60 : PPCGenRegisterInfo(ST.isPPC64() ? PPC::LR8 : PPC::LR,
64 ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX;
65 ImmToIdxMap[PPC::LBZ] = PPC::LBZX; ImmToIdxMap[PPC
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H A DPPCFrameLowering.cpp1 //===-- PPCFrameLowering.cpp - PPC Frame Information ----------------------===//
10 // This file contains the PPC implementation of TargetFrameLowering class.
33 PPC::V0 , PPC::V1 , PPC::V2 , PPC::V3 , PPC::V4 , PPC::V5 , PPC::V6 , PPC
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H A DPPCInstrInfo.cpp16 #include "PPC.h"
65 : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP),
75 if (Directive == PPC::DIR_440 || Directive == PPC::DIR_A2 ||
76 Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500) {
93 if (Directive == PPC::DIR_PWR7 || Directive == PPC::DIR_PWR8)
97 if (Directive != PPC
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H A DPPCISelDAGToDAG.cpp1 //===-- PPCISelDAGToDAG.cpp - PPC --pattern matching inst selector --------===//
11 // converting from a legalized dag to a PPC dag.
15 #include "PPC.h"
41 cl::desc("expose the ANDI glue bug on PPC"), cl::Hidden);
49 /// PPCDAGToDAGISel - PPC specific code to select PPC machine
213 if (RegInfo->getRegClass(Reg) == &PPC::VRRCRegClass) {
232 unsigned InVRSAVE = RegInfo->createVirtualRegister(&PPC::GPRCRegClass);
233 unsigned UpdatedVRSAVE = RegInfo->createVirtualRegister(&PPC::GPRCRegClass);
243 BuildMI(EntryBB, IP, dl, TII.get(PPC
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H A DPPCHazardRecognizers.cpp15 #include "PPC.h"
68 if (!PredMCID || PredMCID->getSchedClass() != PPC::Sched::IIC_SprMTSPR)
83 namespace llvm { namespace PPC { extern int getNonRecordFormOpcode(uint16_t); } } namespace in namespace:llvm
97 case PPC::Sched::IIC_IntDivW:
98 case PPC::Sched::IIC_IntDivD:
99 case PPC::Sched::IIC_LdStLoadUpd:
100 case PPC::Sched::IIC_LdStLDU:
101 case PPC::Sched::IIC_LdStLFDU:
102 case PPC::Sched::IIC_LdStLFDUX:
103 case PPC
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H A DPPCBranchSelector.cpp18 #include "PPC.h"
117 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm())
119 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) &&
122 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ ||
123 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) &&
162 if (I->getOpcode() == PPC::BCC) {
164 // 0. PPC branc
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H A DPPCFastISel.cpp16 #include "PPC.h"
147 unsigned FP64LoadOpc = PPC::LFD);
202 static Optional<PPC::Predicate> getComparePred(CmpInst::Predicate Pred) {
214 return Optional<PPC::Predicate>();
218 return PPC::PRED_EQ;
223 return PPC::PRED_GT;
228 return PPC::PRED_GE;
233 return PPC::PRED_LT;
238 return PPC::PRED_LE;
242 return PPC
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H A DPPCAsmPrinter.cpp19 #include "PPC.h"
99 return "Linux PPC Assembly Printer";
117 return "Darwin PPC Assembly Printer";
230 break; // PPC never has a prefix.
315 case PPC::MovePCtoLR:
316 case PPC::MovePCtoLR8: {
324 EmitToStreamer(OutStreamer, MCInstBuilder(PPC::BL)
333 case PPC::LDtocJTI:
334 case PPC::LDtocCPT:
335 case PPC
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H A DPPCCodeEmitter.cpp15 #include "PPC.h"
92 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
134 case PPC::MovePCtoLR:
135 case PPC::MovePCtoLR8:
148 assert((MI.getOpcode() == PPC::MTOCRF || MI.getOpcode() == PPC::MTOCRF8 ||
149 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) &&
150 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC
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H A DMakefile12 TARGET = PPC
H A DPPCSubtarget.cpp1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
10 // This file implements the PPC specific subclass of TargetSubtargetInfo.
15 #include "PPC.h"
41 // Most PPC* platforms are big endian, PPC64LE is little endian.
116 DarwinDirective = PPC::DIR_NONE;
234 CriticalPathRCs.push_back(&PPC::G8RCRegClass);
236 CriticalPathRCs.push_back(&PPC::GPRCRegClass);
245 case PPC::DIR_440:
246 case PPC::DIR_A2:
247 case PPC
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H A DPPCISelLowering.cpp1 //===-- PPCISelLowering.cpp - PPC DAG Lowering Implementation -------------===//
43 cl::desc("disable preincrement load/store generation on PPC"), cl::Hidden);
46 cl::desc("disable setting the node scheduling preference to ILP on PPC"), cl::Hidden);
49 cl::desc("disable unaligned load/store generation on PPC"), cl::Hidden);
78 addRegisterClass(MVT::i32, &PPC::GPRCRegClass);
79 addRegisterClass(MVT::f32, &PPC::F4RCRegClass);
80 addRegisterClass(MVT::f64, &PPC::F8RCRegClass);
130 addRegisterClass(MVT::i1, &PPC::CRBITRCRegClass);
386 addRegisterClass(MVT::i64, &PPC::G8RCRegClass);
501 addRegisterClass(MVT::v4f32, &PPC
[all...]
H A DPPCJITInfo.cpp152 // ELF PPC 32 support
429 switch ((PPC::RelocationType)MR->getRelocationType()) {
431 case PPC::reloc_pcrel_bx:
438 case PPC::reloc_pcrel_bcx:
446 case PPC::reloc_absolute_high: // high bits of ref -> low 16 of instr
447 case PPC::reloc_absolute_low: { // low bits of ref -> low 16 of instr
451 if (MR->getRelocationType() == PPC::reloc_absolute_high) {
466 case PPC::reloc_absolute_low_ix: { // low bits of ref -> low 14 of instr
/external/llvm/lib/Target/PowerPC/InstPrinter/
H A DPPCInstPrinter.cpp1 //===-- PPCInstPrinter.cpp - Convert PPC MCInst to assembly syntax --------===//
10 // This class prints an PPC MCInst to a .s file.
42 if (MI->getOpcode() == PPC::RLWINM) {
65 if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) &&
75 if (MI->getOpcode() == PPC::RLDICR) {
112 switch ((PPC::Predicate)Code) {
113 case PPC::PRED_LT_MINUS:
114 case PPC::PRED_LT_PLUS:
115 case PPC
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/external/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp37 PPC::R0, PPC::R1, PPC::R2, PPC::R3,
38 PPC::R4, PPC::R5, PPC::R6, PPC::R7,
39 PPC::R8, PPC
[all...]
/external/libunwind/src/ppc/
H A DGinit_remote.c57 #error init_remote :: NO VALID PPC ARCH!

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