| /external/llvm/lib/Transforms/Utils/ |
| H A D | BasicBlockUtils.cpp | 744 BasicBlock *Pred1 = nullptr; local
750 Pred1 = SomePHI->getIncomingBlock(0);
756 Pred1 = *PI++;
766 BranchInst *Pred1Br = dyn_cast<BranchInst>(Pred1->getTerminator());
781 std::swap(Pred1, Pred2);
796 IfTrue = Pred1;
801 IfFalse = Pred1;
814 BasicBlock *CommonPred = Pred1->getSinglePredecessor();
823 if (BI->getSuccessor(0) == Pred1) {
824 IfTrue = Pred1;
[all...] |
| H A D | SimplifyCFG.cpp | 1143 BasicBlock *Pred1 = *PI++;
1146 BasicBlock *BB2 = (Pred0 == BB1) ? Pred1 : Pred0;
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| H A D | R600InstrInfo.h | 97 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | AMDGPUInstrInfo.cpp | 214 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, argument
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| H A D | AMDGPUInstrInfo.h | 117 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | R600InstrInfo.cpp | 447 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, argument
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | R600InstrInfo.h | 97 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | AMDGPUInstrInfo.cpp | 214 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, argument
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| H A D | AMDGPUInstrInfo.h | 117 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | R600InstrInfo.cpp | 447 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, argument
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| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUInstrInfo.h | 132 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | AMDGPUInstrInfo.cpp | 245 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, argument
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| H A D | R600InstrInfo.h | 192 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | R600InstrInfo.cpp | 1007 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 142 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | HexagonInstrInfo.cpp | 1054 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, argument
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 207 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | PPCInstrInfo.cpp | 1199 const SmallVectorImpl<MachineOperand> &Pred1,
1201 assert(Pred1.size() == 2 && "Invalid PPC first predicate");
1204 if (Pred1[1].getReg() == PPC::CTR8 || Pred1[1].getReg() == PPC::CTR)
1210 if (Pred1[1].getReg() != Pred2[1].getReg())
1213 PPC::Predicate P1 = (PPC::Predicate) Pred1[0].getImm();
1198 SubsumesPredicate( const SmallVectorImpl<MachineOperand> &Pred1, const SmallVectorImpl<MachineOperand> &Pred2) const argument
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| /external/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 714 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, argument
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 86 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
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| H A D | ARMBaseInstrInfo.cpp | 480 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, argument
482 if (Pred1.size() > 2 || Pred2.size() > 2)
485 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm();
|