Searched refs:RHS2 (Results 1 - 4 of 4) sorted by relevance
/external/llvm/include/llvm/ADT/ |
H A D | SparseBitVector.h | 250 // RHS1 & ~RHS2 into this element 252 const SparseBitVectorElement &RHS2, 258 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i]; 694 // Result of RHS1 & ~RHS2 is stored into this bitmap. 696 const SparseBitVector<ElementSize> &RHS2) 701 ElementListConstIter Iter2 = RHS2.Elements.begin(); 704 // If RHS2 is empty, we still have to copy RHS1 709 while (Iter2 != RHS2.Elements.end()) { 747 const SparseBitVector<ElementSize> *RHS2) { 748 intersectWithComplement(*RHS1, *RHS2); [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSelect.cpp | 1035 Value *LHS, *RHS, *LHS2, *RHS2; 1037 if (SelectPatternFlavor SPF2 = MatchSelectPattern(LHS, LHS2, RHS2)) 1038 if (Instruction *R = FoldSPFofSPF(cast<Instruction>(LHS),SPF2,LHS2,RHS2, 1041 if (SelectPatternFlavor SPF2 = MatchSelectPattern(RHS, LHS2, RHS2)) 1042 if (Instruction *R = FoldSPFofSPF(cast<Instruction>(RHS),SPF2,LHS2,RHS2,
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 3612 SDValue RHS1, RHS2; local 3614 expandf64Toi32(RHS, DAG, RHS1, RHS2); 3616 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); 3620 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; 7364 unsigned RHS2 = MI->getOperand(4).getReg(); local 7369 .addReg(LHS2).addReg(RHS2)
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 12082 SDValue RHS2 = Extract128BitVector(RHS, NumElems/2, DAG, dl); 12089 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2, CC)); 15002 SDValue RHS2 = Extract128BitVector(RHS, NumElems/2, DAG, dl); 15009 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2)); 19584 SDValue RHS2 = Extract128BitVector(RHS, NumElems/2, DAG, DL); 19588 RHS = DAG.getNode(Opc, DL, LHS2.getValueType(), LHS2, RHS2);
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