Searched refs:RRS (Results 1 - 5 of 5) sorted by relevance

/external/valgrind/main/none/tests/s390x/
H A Dopcodes.h47 #define RRS(op1,r1,r2,b4,d4,m3,u0,op2) \ macro
163 #define CGRB(r1,r2,b4,d4,m3) RRS(ec,r1,r2,b4,d4,m3,0,e4)
194 #define CLGRB(r1,r2,b4,d4,m3) RRS(ec,r1,r2,b4,d4,m3,0,e5)
209 #define CLRB(r1,r2,b4,d4,m3) RRS(ec,r1,r2,b4,d4,m3,0,f7)
214 #define CRB(r1,r2,b4,d4,m3) RRS(ec,r1,r2,b4,d4,m3,0,f6)
/external/valgrind/main/VEX/priv/
H A Dhost_arm_defs.h143 } RRS; member in union:__anon31814::__anon31815
H A Dhost_arm_defs.c230 am->ARMam1.RRS.base = base;
231 am->ARMam1.RRS.index = index;
232 am->ARMam1.RRS.shift = shift;
246 ppHRegARM(am->ARMam1.RRS.base);
248 ppHRegARM(am->ARMam1.RRS.index);
249 vex_printf(",%u)", am->ARMam1.RRS.shift);
262 // addHRegUse(u, HRmRead, am->ARMam1.RRS.base);
263 // addHRegUse(u, HRmRead, am->ARMam1.RRS.index);
H A Dguest_s390_toIR.c15153 } RRS; member in union:__anon31628
15951 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
15952 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
15953 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
15955 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
15956 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
15957 ovl.fmt.RRS
[all...]
H A Dhost_arm_isel.c755 toBool( hregClass(am->ARMam1.RRS.base) == HRcInt32
756 && hregIsVirtual(am->ARMam1.RRS.base)
757 && hregClass(am->ARMam1.RRS.index) == HRcInt32
758 && hregIsVirtual(am->ARMam1.RRS.index)
759 && am->ARMam1.RRS.shift >= 0
760 && am->ARMam1.RRS.shift <= 3 );
778 /* FIXME: add RRS matching */

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