Searched refs:R_028440_PA_CL_VPORT_XOFFSET_0 (Results 1 - 16 of 16) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/
H A Devergreen_hw_context.c83 {R_028440_PA_CL_VPORT_XOFFSET_0, 0, 0},
414 {R_028440_PA_CL_VPORT_XOFFSET_0, 0, 0},
H A Dr600_hw_context.c379 {R_028440_PA_CL_VPORT_XOFFSET_0, 0, 0},
H A Dr600_state.c1225 r600_pipe_state_add_reg(rstate, R_028440_PA_CL_VPORT_XOFFSET_0, fui(state->translate[0]));
H A Devergreen_state.c1230 r600_pipe_state_add_reg(rstate, R_028440_PA_CL_VPORT_XOFFSET_0, fui(state->translate[0]));
H A Devergreend.h1712 #define R_028440_PA_CL_VPORT_XOFFSET_0 0x00028440 macro
H A Dr600d.h2260 #define R_028440_PA_CL_VPORT_XOFFSET_0 0x028440 macro
/external/mesa3d/src/gallium/drivers/r600/
H A Devergreen_hw_context.c83 {R_028440_PA_CL_VPORT_XOFFSET_0, 0, 0},
414 {R_028440_PA_CL_VPORT_XOFFSET_0, 0, 0},
H A Dr600_hw_context.c379 {R_028440_PA_CL_VPORT_XOFFSET_0, 0, 0},
H A Dr600_state.c1225 r600_pipe_state_add_reg(rstate, R_028440_PA_CL_VPORT_XOFFSET_0, fui(state->translate[0]));
H A Devergreen_state.c1230 r600_pipe_state_add_reg(rstate, R_028440_PA_CL_VPORT_XOFFSET_0, fui(state->translate[0]));
H A Devergreend.h1712 #define R_028440_PA_CL_VPORT_XOFFSET_0 0x00028440 macro
H A Dr600d.h2260 #define R_028440_PA_CL_VPORT_XOFFSET_0 0x028440 macro
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/
H A Dsi_state.c290 si_pm4_set_reg(pm4, R_028440_PA_CL_VPORT_XOFFSET_0, fui(state->translate[0]));
H A Dsid.h5077 #define R_028440_PA_CL_VPORT_XOFFSET_0 0x028440 macro
/external/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_state.c290 si_pm4_set_reg(pm4, R_028440_PA_CL_VPORT_XOFFSET_0, fui(state->translate[0]));
H A Dsid.h5077 #define R_028440_PA_CL_VPORT_XOFFSET_0 0x028440 macro

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