Searched refs:RegMask (Results 1 - 8 of 8) sorted by relevance

/external/llvm/include/llvm/CodeGen/
H A DMachineOperand.h158 const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut. member in union:llvm::MachineOperand::__anon25488
467 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
471 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) { argument
474 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
477 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
482 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
486 return Contents.RegMask;
492 return Contents.RegMask;
664 /// A RegMask operand represents a set of non-clobbered physical registers on
675 Op.Contents.RegMask
[all...]
H A DMachineRegisterInfo.h658 /// addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
660 void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) { argument
661 UsedPhysRegMask.setBitsNotInMask(RegMask);
H A DSelectionDAGNodes.h1667 // The memory for RegMask is not owned by the node.
1668 const uint32_t *RegMask; member in class:RegisterMaskSDNode
1672 RegMask(mask) {}
1675 const uint32_t *getRegMask() const { return RegMask; }
H A DSelectionDAG.h475 SDValue getRegisterMask(const uint32_t *RegMask);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp1228 /// by RegMask, and add them to LRegs.
1229 static void CheckForLiveRegDefMasked(SUnit *SU, const uint32_t *RegMask, argument
1237 if (!MachineOperand::clobbersPhysReg(RegMask, i)) continue;
1317 if (const uint32_t *RegMask = getNodeRegMask(Node))
1318 CheckForLiveRegDefMasked(SU, RegMask, LiveRegDefs, RegAdded, LRegs);
2709 const uint32_t *RegMask = getNodeRegMask(SU->getNode());
2710 if(!ImpDefs && !RegMask)
2721 if (RegMask && MachineOperand::clobbersPhysReg(RegMask, PI->getReg()) &&
H A DSelectionDAG.cpp1640 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { argument
1643 ID.AddPointer(RegMask);
1648 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
/external/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp349 const uint32_t* RegMask = getCallPreservedMask(CC); local
350 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister()))
H A DX86ISelLowering.cpp17553 const uint32_t *RegMask =
17560 .addRegMask(RegMask)
17569 .addRegMask(RegMask)
17670 const uint32_t *RegMask =
17682 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask);
17693 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask);
17704 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask);

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