Searched refs:ShTy (Results 1 - 4 of 4) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 1330 EVT ShTy = N->getOperand(1).getValueType(); local 1338 NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy)); 1352 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy)); 1355 DAG.getConstant(Amt, ShTy)), 1357 DAG.getConstant(NVTBits-Amt, ShTy))); 1368 NVT, InH, DAG.getConstant(Amt-NVTBits,ShTy)); 1376 DAG.getConstant(Amt, ShTy)), 1378 DAG.getConstant(NVTBits-Amt, ShTy))); 1379 Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, ShTy)); 1387 DAG.getConstant(NVTBits-1, ShTy)); 1415 EVT ShTy = Amt.getValueType(); local 1503 EVT ShTy = Amt.getValueType(); local [all...] |
H A D | TargetLowering.cpp | 645 EVT ShTy = getShiftAmountTy(InnerVT); local 646 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) 647 ShTy = InnerVT; 650 TLO.DAG.getConstant(ShAmt, ShTy));
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H A D | SelectionDAG.cpp | 1752 EVT ShTy = TM.getTargetLowering()->getShiftAmountTy(LHSTy); local 1753 if (OpTy == ShTy || OpTy.isVector()) return Op; 1755 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1756 return getNode(Opcode, SDLoc(Op), ShTy, Op);
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 2539 CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, argument 2543 Op->RegShiftedReg.ShiftTy = ShTy; 2553 CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, argument 2556 Op->RegShiftedImm.ShiftTy = ShTy;
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