Searched refs:ShiftOp (Results 1 - 10 of 10) sorted by relevance

/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp535 BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0); local
536 if (ShiftOp && !ShiftOp->isShift())
537 ShiftOp = nullptr;
539 if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
553 ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
558 Value *X = ShiftOp->getOperand(0);
563 if (I.getOpcode() == ShiftOp->getOpcode()) {
580 ShiftOp
[all...]
/external/chromium_org/v8/src/arm/
H A Dconstants-arm.h228 enum ShiftOp { enum in namespace:v8::internal
235 // Use a special code to make the distinction. The RRX ShiftOp is only used
558 inline int ShiftValue() const { return static_cast<ShiftOp>(Bits(6, 5)); }
559 inline ShiftOp ShiftField() const {
560 return static_cast<ShiftOp>(BitField(6, 5));
H A Dassembler-arm.h502 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
516 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
542 ShiftOp shift_op() const { return shift_op_; }
547 ShiftOp shift_op_;
575 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
605 ShiftOp shift_op_;
H A Ddisasm-arm.cc191 ShiftOp shift = instr->ShiftField();
H A Dassembler-arm.cc281 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) {
302 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) {
329 ShiftOp shift_op, int shift_imm, AddrMode am) {
H A Dsimulator-arm.cc1349 ShiftOp shift = instr->ShiftField();
/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp723 unsigned ShiftOp = MI->getOperand(OpNum).getImm();
724 bool isASR = (ShiftOp & (1 << 5)) != 0;
725 unsigned Amt = ShiftOp & 0x1f;
/external/llvm/lib/Target/ARM/
H A DARMCodeEmitter.cpp1452 unsigned ShiftOp = MI.getOperand(3).getImm();
1453 ARM_AM::ShiftOpc Opc = ARM_AM::getSORegShOp(ShiftOp);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp2106 SDValue ShiftOp = N->getOperand(1); local
2111 if (ShiftOp.getValueType() != ShiftTy)
2112 ShiftOp = DAG.getZExtOrTrunc(ShiftOp, dl, ShiftTy);
2114 SDValue Ops[] = { LHSL, LHSH, ShiftOp };
H A DSelectionDAGBuilder.cpp1935 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), getCurSDLoc(),
1945 ShiftOp,
1952 ShiftOp,
1958 DAG.getConstant(1, VT), ShiftOp);

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