| /external/icu/icu4c/source/layout/ |
| H A D | LigatureSubstProc.cpp | 20 #define SignBit(m) ((ExtendedComplement(m) >> 1) & (le_int32)(m)) macro
21 #define SignExtend(v,m) (((v) & SignBit(m))? ((v) | ExtendedComplement(m)): (v))
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| H A D | LigatureSubstProc2.cpp | 20 #define SignBit(m) ((ExtendedComplement(m) >> 1) & (le_int32)(m)) macro
21 #define SignExtend(v,m) (((v) & SignBit(m))? ((v) | ExtendedComplement(m)): (v))
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 193 SDValue SignBit = DAG.getNode(ISD::SHL, dl, RVT, DAG.getConstant(1, RVT), local
196 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
201 SignBit = DAG.getNode(ISD::SRL, dl, RVT, SignBit,
203 TLI.getShiftAmountTy(SignBit.getValueType())));
204 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
206 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
[all...] |
| H A D | LegalizeDAG.cpp | 1551 SDValue SignBit;
1556 SignBit = DAG.getNode(ISD::BITCAST, dl, IVT, Tmp2);
1569 SignBit = DAG.getLoad(LoadTy, dl, Ch, StackPtr, MachinePointerInfo(),
1580 SignBit = DAG.getLoad(LoadTy, dl, Ch, LoadPtr, MachinePointerInfo(),
1587 SignBit = DAG.getNode(ISD::SHL, dl, LoadTy, SignBit,
1589 TLI.getShiftAmountTy(SignBit.getValueType())));
1593 SignBit = DAG.getSetCC(dl, getSetCCResultType(SignBit.getValueType()),
1594 SignBit, DA
[all...] |
| H A D | TargetLowering.cpp | 767 APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt); local
771 if (KnownZero.intersects(SignBit) || (HighBits & ~NewMask) == HighBits)
786 if (KnownOne.intersects(SignBit))
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| H A D | SelectionDAG.cpp | 2098 APInt SignBit = APInt::getSignBit(BitWidth); local
2099 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2101 if (KnownZero.intersects(SignBit)) {
2103 } else if (KnownOne.intersects(SignBit)) {
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| H A D | DAGCombiner.cpp | 6262 APInt SignBit = APInt::getSignBit(VT.getSizeInBits()); local
6265 NewConv, DAG.getConstant(SignBit, VT));
6268 NewConv, DAG.getConstant(~SignBit, VT));
6301 APInt SignBit = APInt::getSignBit(VT.getSizeInBits()); local
6303 X, DAG.getConstant(SignBit, VT));
6309 Cst, DAG.getConstant(~SignBit, VT));
|
| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 698 APInt SignBit(APInt::getSignBit(BitWidth));
700 SignBit = APIntOps::lshr(SignBit, ShiftAmt);
711 } else if ((KnownOne & SignBit) != 0) { // New bits are known one.
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| H A D | InstCombineCompares.cpp | 1107 // (icmp u/s (xor A SignBit), C) -> (icmp s/u A, (xor C SignBit))
1109 const APInt &SignBit = XorCst->getValue(); local
1114 Builder->getInt(RHSV ^ SignBit));
1117 // (icmp u/s (xor A ~SignBit), C) -> (icmp s/u (xor C ~SignBit), A)
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| /external/llvm/lib/Support/ |
| H A D | APInt.cpp | 1050 unsigned SignBit = APINT_BITS_PER_WORD - BitWidth;
1052 (((int64_t(VAL) << SignBit) >> SignBit) >> shiftAmt));
|
| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelLowering.cpp | 1717 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); local
1721 Zero, SignBit);
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 11482 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, SrcVT, Op1, Mask1);
11487 SignBit = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f64, SignBit);
11488 SignBit = DAG.getNode(X86ISD::FSRL, dl, MVT::v2f64, SignBit,
11490 SignBit = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, SignBit);
11491 SignBit = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, SignBit,
11518 return DAG.getNode(X86ISD::FOR, dl, VT, Val, SignBit);
[all...] |