Searched refs:SpillSize (Results 1 - 4 of 4) sorted by relevance
| /external/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.h | 278 unsigned SpillSize; member in class:llvm::CodeGenRegisterClass
375 unsigned SpillSize; member in struct:llvm::CodeGenRegisterClass::Key
379 : Members(M), SpillSize(S), SpillAlignment(A) {}
383 SpillSize(RC.SpillSize),
386 // Lexicographical order of (Members, SpillSize, SpillAlignment).
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| H A D | CodeGenRegisters.cpp | 715 SpillSize = Size ? Size : MVT(VTs[0]).getSizeInBits();
732 SpillSize(Props.SpillSize),
772 OS << "{ S=" << K.SpillSize << ", A=" << K.SpillAlignment;
785 return std::tie(*Members, SpillSize, SpillAlignment) <
786 std::tie(*B.Members, B.SpillSize, B.SpillAlignment);
801 A->SpillSize <= B->SpillSize &&
821 if (A->SpillSize < B->SpillSize)
[all...] |
| H A D | RegisterInfoEmitter.cpp | 891 assert((RC.SpillSize/8) <= 0xffff && "SpillSize too large.");
899 << RC.SpillSize/8 << ", "
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| /external/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 418 unsigned SpillSize; local
423 bool Valid = TII.getStackSlotRange(RC, MO.getSubReg(), SpillSize,
428 MIB.addImm(SpillSize);
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