/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
H A D | prog_opt_constant_fold.c | 39 if (inst->SrcReg[i].File != PROGRAM_CONSTANT) 146 get_value(prog, &inst->SrcReg[0], a); 147 get_value(prog, &inst->SrcReg[1], b); 155 inst->SrcReg[0] = src_reg_for_vec4(prog, result); 157 inst->SrcReg[1].File = PROGRAM_UNDEFINED; 158 inst->SrcReg[1].Swizzle = SWIZZLE_NOOP; 175 get_value(prog, &inst->SrcReg[0], a); 176 get_value(prog, &inst->SrcReg[1], b); 177 get_value(prog, &inst->SrcReg[2], c); 185 inst->SrcReg[ [all...] |
H A D | prog_parameter_layout.c | 131 if (inst->SrcReg[i].Base.RelAddr) { 134 if (!inst->SrcReg[i].Symbol->pass1_done) { 137 inst->SrcReg[i].Symbol->param_binding_begin, 138 inst->SrcReg[i].Symbol->param_binding_length); 145 inst->SrcReg[i].Symbol->param_binding_begin = new_begin; 146 inst->SrcReg[i].Symbol->pass1_done = 1; 153 inst->Base.SrcReg[i] = inst->SrcReg[i].Base; 154 inst->Base.SrcReg[i].Index += 155 inst->SrcReg[ [all...] |
H A D | programopt.c | 94 newInst[i].SrcReg[0].File = PROGRAM_STATE_VAR; 95 newInst[i].SrcReg[0].Index = mvpRef[i]; 96 newInst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP; 97 newInst[i].SrcReg[1].File = PROGRAM_INPUT; 98 newInst[i].SrcReg[1].Index = VERT_ATTRIB_POS; 99 newInst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP; 166 newInst[0].SrcReg[0].File = PROGRAM_INPUT; 167 newInst[0].SrcReg[0].Index = VERT_ATTRIB_POS; 168 newInst[0].SrcReg[0].Swizzle = SWIZZLE_XXXX; 169 newInst[0].SrcReg[ [all...] |
H A D | nvvertparse.c | 815 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[0])) 847 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[0])) 855 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[1])) 863 if (inst->SrcReg[0].File == PROGRAM_ENV_PARAM && 864 inst->SrcReg[1].File == PROGRAM_ENV_PARAM && 865 inst->SrcReg[0].Index != inst->SrcReg[1].Index) 869 if (inst->SrcReg[0].File == PROGRAM_INPUT && 870 inst->SrcReg[1].File == PROGRAM_INPUT && 871 inst->SrcReg[ [all...] |
/external/mesa3d/src/mesa/program/ |
H A D | prog_opt_constant_fold.c | 39 if (inst->SrcReg[i].File != PROGRAM_CONSTANT) 146 get_value(prog, &inst->SrcReg[0], a); 147 get_value(prog, &inst->SrcReg[1], b); 155 inst->SrcReg[0] = src_reg_for_vec4(prog, result); 157 inst->SrcReg[1].File = PROGRAM_UNDEFINED; 158 inst->SrcReg[1].Swizzle = SWIZZLE_NOOP; 175 get_value(prog, &inst->SrcReg[0], a); 176 get_value(prog, &inst->SrcReg[1], b); 177 get_value(prog, &inst->SrcReg[2], c); 185 inst->SrcReg[ [all...] |
H A D | prog_parameter_layout.c | 131 if (inst->SrcReg[i].Base.RelAddr) { 134 if (!inst->SrcReg[i].Symbol->pass1_done) { 137 inst->SrcReg[i].Symbol->param_binding_begin, 138 inst->SrcReg[i].Symbol->param_binding_length); 145 inst->SrcReg[i].Symbol->param_binding_begin = new_begin; 146 inst->SrcReg[i].Symbol->pass1_done = 1; 153 inst->Base.SrcReg[i] = inst->SrcReg[i].Base; 154 inst->Base.SrcReg[i].Index += 155 inst->SrcReg[ [all...] |
H A D | programopt.c | 94 newInst[i].SrcReg[0].File = PROGRAM_STATE_VAR; 95 newInst[i].SrcReg[0].Index = mvpRef[i]; 96 newInst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP; 97 newInst[i].SrcReg[1].File = PROGRAM_INPUT; 98 newInst[i].SrcReg[1].Index = VERT_ATTRIB_POS; 99 newInst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP; 166 newInst[0].SrcReg[0].File = PROGRAM_INPUT; 167 newInst[0].SrcReg[0].Index = VERT_ATTRIB_POS; 168 newInst[0].SrcReg[0].Swizzle = SWIZZLE_XXXX; 169 newInst[0].SrcReg[ [all...] |
H A D | nvvertparse.c | 815 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[0])) 847 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[0])) 855 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[1])) 863 if (inst->SrcReg[0].File == PROGRAM_ENV_PARAM && 864 inst->SrcReg[1].File == PROGRAM_ENV_PARAM && 865 inst->SrcReg[0].Index != inst->SrcReg[1].Index) 869 if (inst->SrcReg[0].File == PROGRAM_INPUT && 870 inst->SrcReg[1].File == PROGRAM_INPUT && 871 inst->SrcReg[ [all...] |
/external/llvm/lib/CodeGen/ |
H A D | PHIEliminationUtils.h | 17 /// SrcReg when following the CFG edge to SuccMBB. This needs to be after 18 /// any def of SrcReg, but before any subsequent point where control flow 22 unsigned SrcReg);
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H A D | RegisterCoalescer.h | 35 /// SrcReg - the virtual register that will be coalesced into dstReg. 36 unsigned SrcReg; member in class:llvm::CoalescerPair 42 /// SrcIdx - The sub-register index of the old SrcReg in the new coalesced 52 /// Flipped - True when DstReg and SrcReg are reversed from the original 58 /// SrcReg and DstReg. 63 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0), 70 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0), 77 /// flip - Swap SrcReg and DstReg. Return false if swapping is impossible 105 unsigned getSrcReg() const { return SrcReg; } 111 /// getSrcIdx - Return the subregister index that SrcReg wil [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
H A D | radeon_program_tex.c | 70 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; 71 inst_mov->U.I.SrcReg[1].File = RC_FILE_CONSTANT; 72 inst_mov->U.I.SrcReg[1].Index = 76 reset_srcreg(&inst->U.I.SrcReg[0]); 77 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY; 78 inst->U.I.SrcReg[0].Index = temp; 93 inst_rcp->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; 96 inst_rcp->U.I.SrcReg[ [all...] |
H A D | radeon_pair_translate.c | 44 inst->SrcReg[2] = inst->SrcReg[1]; 45 inst->SrcReg[1].File = RC_FILE_NONE; 46 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111; 47 inst->SrcReg[1].Negate = RC_MASK_NONE; 51 tmp = inst->SrcReg[2]; 52 inst->SrcReg[2] = inst->SrcReg[0]; 53 inst->SrcReg[0] = tmp; 66 inst->SrcReg[ [all...] |
H A D | r3xx_vertprog.c | 43 (PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[x]), \ 48 t_src_class(vpi->SrcReg[x].File), \ 49 RC_MASK_NONE) | (vpi->SrcReg[x].RelAddr << 4)) 197 inst[1] = t_src(vp, &vpi->SrcReg[0]); 213 inst[1] = t_src(vp, &vpi->SrcReg[0]); 214 inst[2] = t_src(vp, &vpi->SrcReg[1]); 229 inst[1] = t_src_scalar(vp, &vpi->SrcReg[0]); 247 inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[0]), t_swizzle(GET_SWZ(vpi->SrcReg[0].Swizzle, 0)), // X 248 t_swizzle(GET_SWZ(vpi->SrcReg[ [all...] |
H A D | radeon_dataflow_swizzles.c | 43 if (GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED) 47 c->SwizzleCaps->Split(inst->U.I.SrcReg[src], usemask, &split); 58 mov->U.I.SrcReg[0] = inst->U.I.SrcReg[src]; 64 SET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED); 66 phase_refmask |= 1 << GET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan); 71 masked_negate = split.Phase[phase] & mov->U.I.SrcReg[0].Negate; 73 mov->U.I.SrcReg[0].Negate = 0; 75 mov->U.I.SrcReg[0].Negate = RC_MASK_XYZW; 79 inst->U.I.SrcReg[sr [all...] |
H A D | radeon_optimize.c | 76 &reader_data->Writer->U.I.PreSub.SrcReg[0], 77 &reader_data->Writer->U.I.PreSub.SrcReg[1])) { 91 if(reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_TEMPORARY && 92 reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_INPUT && 162 *reader_data.Readers[i].U.I.Src = chain_srcregs(*reader_data.Readers[i].U.I.Src, inst_mov->U.I.SrcReg[0]); 164 if (inst_mov->U.I.SrcReg[0].File == RC_FILE_PRESUB) 215 if (is_src_uniform_constant(inst->U.I.SrcReg[2], &swz, &negate)) { 222 if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) { 226 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; 227 inst->U.I.SrcReg[ [all...] |
H A D | radeon_compiler.c | 123 if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT) 124 c->Program.InputsRead |= 1 << inst->U.I.SrcReg[i].Index; 149 if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT && inst->U.I.SrcReg[i].Index == input) { 150 inst->U.I.SrcReg[i].File = new_input.File; 151 inst->U.I.SrcReg[i].Index = new_input.Index; 152 inst->U.I.SrcReg[i].Swizzle = combine_swizzles(new_input.Swizzle, inst->U.I.SrcReg[i].Swizzle); 153 if (!inst->U.I.SrcReg[i].Abs) { 154 inst->U.I.SrcReg[ [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_program_tex.c | 70 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; 71 inst_mov->U.I.SrcReg[1].File = RC_FILE_CONSTANT; 72 inst_mov->U.I.SrcReg[1].Index = 76 reset_srcreg(&inst->U.I.SrcReg[0]); 77 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY; 78 inst->U.I.SrcReg[0].Index = temp; 93 inst_rcp->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; 96 inst_rcp->U.I.SrcReg[ [all...] |
H A D | radeon_pair_translate.c | 44 inst->SrcReg[2] = inst->SrcReg[1]; 45 inst->SrcReg[1].File = RC_FILE_NONE; 46 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111; 47 inst->SrcReg[1].Negate = RC_MASK_NONE; 51 tmp = inst->SrcReg[2]; 52 inst->SrcReg[2] = inst->SrcReg[0]; 53 inst->SrcReg[0] = tmp; 66 inst->SrcReg[ [all...] |
H A D | r3xx_vertprog.c | 43 (PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[x]), \ 48 t_src_class(vpi->SrcReg[x].File), \ 49 RC_MASK_NONE) | (vpi->SrcReg[x].RelAddr << 4)) 197 inst[1] = t_src(vp, &vpi->SrcReg[0]); 213 inst[1] = t_src(vp, &vpi->SrcReg[0]); 214 inst[2] = t_src(vp, &vpi->SrcReg[1]); 229 inst[1] = t_src_scalar(vp, &vpi->SrcReg[0]); 247 inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[0]), t_swizzle(GET_SWZ(vpi->SrcReg[0].Swizzle, 0)), // X 248 t_swizzle(GET_SWZ(vpi->SrcReg[ [all...] |
H A D | radeon_dataflow_swizzles.c | 43 if (GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED) 47 c->SwizzleCaps->Split(inst->U.I.SrcReg[src], usemask, &split); 58 mov->U.I.SrcReg[0] = inst->U.I.SrcReg[src]; 64 SET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED); 66 phase_refmask |= 1 << GET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan); 71 masked_negate = split.Phase[phase] & mov->U.I.SrcReg[0].Negate; 73 mov->U.I.SrcReg[0].Negate = 0; 75 mov->U.I.SrcReg[0].Negate = RC_MASK_XYZW; 79 inst->U.I.SrcReg[sr [all...] |
H A D | radeon_optimize.c | 76 &reader_data->Writer->U.I.PreSub.SrcReg[0], 77 &reader_data->Writer->U.I.PreSub.SrcReg[1])) { 91 if(reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_TEMPORARY && 92 reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_INPUT && 162 *reader_data.Readers[i].U.I.Src = chain_srcregs(*reader_data.Readers[i].U.I.Src, inst_mov->U.I.SrcReg[0]); 164 if (inst_mov->U.I.SrcReg[0].File == RC_FILE_PRESUB) 215 if (is_src_uniform_constant(inst->U.I.SrcReg[2], &swz, &negate)) { 222 if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) { 226 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; 227 inst->U.I.SrcReg[ [all...] |
H A D | radeon_compiler.c | 123 if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT) 124 c->Program.InputsRead |= 1 << inst->U.I.SrcReg[i].Index; 149 if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT && inst->U.I.SrcReg[i].Index == input) { 150 inst->U.I.SrcReg[i].File = new_input.File; 151 inst->U.I.SrcReg[i].Index = new_input.Index; 152 inst->U.I.SrcReg[i].Swizzle = combine_swizzles(new_input.Swizzle, inst->U.I.SrcReg[i].Swizzle); 153 if (!inst->U.I.SrcReg[i].Abs) { 154 inst->U.I.SrcReg[ [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | Thumb1InstrInfo.cpp | 42 unsigned DestReg, unsigned SrcReg, 45 .addReg(SrcReg, getKillRegState(KillSrc))); 46 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) && 52 unsigned SrcReg, bool isKill, int FI, 56 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && 57 isARMLowRegister(SrcReg))) && "Unknown regclass!"); 60 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && 61 isARMLowRegister(SrcReg))) { 73 .addReg(SrcReg, getKillRegState(isKill)) 40 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 51 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/tests/ |
H A D | radeon_compiler_util_tests.c | 26 &replace_inst.U.I.SrcReg[0], 27 &add_inst.U.I.SrcReg[0], &add_inst.U.I.SrcReg[1]);
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/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
H A D | radeon_compiler_util_tests.c | 26 &replace_inst.U.I.SrcReg[0], 27 &add_inst.U.I.SrcReg[0], &add_inst.U.I.SrcReg[1]);
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