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Searched refs:TCL_OUTPUT_VTXFMT (Results 1 - 12 of 12) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/
H A D	radeon_maos_arrays.c	`248 vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & 281 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { 283 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;`
H A D	radeon_maos_verts.c	`316 GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & 366 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { 368 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;`
H A D	radeon_context.h	`170 #define TCL_OUTPUT_VTXFMT 1 macro`
H A D	radeon_state.c	570 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_SPEC; 571 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_DIFFUSE; 583 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_SPEC; 584 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_DIFFUSE; 592 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_DIFFUSE; 595 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_SPEC; 596 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_DIFFUSE; 599 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_DIFFUSE; 603 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_SPEC;
H A D	radeon_texstate.c	`746 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~(RADEON_ST_BIT(unit) \| 918 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_Q_BIT(unit); 1076 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_ST_BIT(unit);`
H A D	radeon_state_init.c	`831 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] =`
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A D	radeon_maos_arrays.c	`248 vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & 281 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { 283 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;`
H A D	radeon_maos_verts.c	`316 GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & 366 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { 368 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;`
H A D	radeon_context.h	`170 #define TCL_OUTPUT_VTXFMT 1 macro`
H A D	radeon_state.c	570 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_SPEC; 571 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_DIFFUSE; 583 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_SPEC; 584 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_DIFFUSE; 592 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_DIFFUSE; 595 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_SPEC; 596 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_DIFFUSE; 599 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_DIFFUSE; 603 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_TCL_VTX_PK_SPEC;
H A D	radeon_texstate.c	`746 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~(RADEON_ST_BIT(unit) \| 918 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_Q_BIT(unit); 1076 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] \|= RADEON_ST_BIT(unit);`
H A D	radeon_state_init.c	`831 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] =`

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