Searched refs:TEST3 (Results 1 - 19 of 19) sorted by relevance

/external/clang/test/CodeGenCXX/
H A D2010-06-22-BitfieldInit.cpp12 } TEST3; typedef in typeref:struct:_TEST3
14 TEST3 test =
/external/clang/test/Frontend/
H A Dverify.c66 #ifdef TEST3
67 #ifndef TEST3 // expected-note {{line_67}}
71 #elif defined(TEST3) // expected-note {{line_71}}
76 # ifndef TEST3 // expected-note {{line_76_ignored}}
H A Dverify3.c28 #ifdef TEST3
/external/valgrind/main/none/tests/mips64/
H A Dbranch_and_jump_instructions.c107 #define TEST3(instruction, RDval, RSval, RTval, RD, RS, RT) \ macro
193 TEST3("beq", 0, 0, 1, 2, 3, 4);
194 TEST3("beq", 1, 1, 1, 3, 4, 5);
195 TEST3("beq", 2, 0xffffffff, 0xffffffff, 4, 5, 6);
196 TEST3("beq", 3, 0xffffffff, 0xfffffffe, 5, 6, 7);
197 TEST3("beq", 4, 0xfffffffe, 0xffffffff, 6, 7, 8);
198 TEST3("beq", 5, 0xffffffff, 0xffffffff, 7, 8, 9);
199 TEST3("beq", 6, 0x5, 0x5, 8, 9, 10);
200 TEST3("beq", 7, -3, -4, 9, 10, 11);
201 TEST3("be
[all...]
H A Dmove_instructions.c92 #define TEST3(instruction, FD, FS, cc, offset) \ macro
207 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 0);
208 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 8);
209 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 16);
210 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 24);
211 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 32)
212 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 40)
213 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 48)
214 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 56)
215 TEST3("mov
[all...]
H A Dfpu_load_store.c15 TEST3("ldc1", i, reg_val1);
18 TEST3("ldc1", i, reg_val2);
H A Darithmetic_instruction.c67 TEST3("clo $t0, $t1", reg_val1[i], t0, t1);
74 TEST3("clz $t0, $t1", reg_val1[i], t0, t1);
123 TEST3("dclo $t0, $t1", reg_val1[i], t0, t1);
124 TEST3("dclo $v0, $v1", reg_val2[i], v0, v1);
129 TEST3("dclz $t0, $t1", reg_val1[i], t0, t1);
130 TEST3("dclz $v0, $v1", reg_val2[i], v0, v1);
281 TEST3("seb $t0, $t1", reg_val1[i], t0, t1);
290 TEST3("seh $t0, $t1", reg_val1[i], t0, t1);
H A Dmacro_load_store.h47 #define TEST3(instruction, offset, mem) \ macro
H A Dmacro_int.h35 #define TEST3(instruction, RSval, RD, RS) \ macro
/external/clang/test/Driver/
H A Ddarwin-version.c27 #ifdef TEST3
/external/llvm/test/MC/AsmParser/
H A Ddirective_ascii.s17 # CHECK: TEST3:
22 TEST3: label
H A Ddirective_values.s18 # CHECK: TEST3:
20 TEST3: label
H A Ddirective_fill.s21 # CHECK: TEST3
26 TEST3: label
/external/clang/test/CXX/basic/basic.start/basic.start.main/
H A Dp2.cpp41 #elif TEST3
/external/llvm/test/MC/ARM/
H A Deh-directive-multiple-offsets.s67 @ TEST3: Check .setfp, .pad, .setfp directive.
69 .section .TEST3
91 @ CHECK: Name: .ARM.extab.TEST3
H A Deh-directive-pad.s89 @ TEST3
91 .section .TEST3
122 @ CHECK: Name: .ARM.extab.TEST3
H A Deh-directive-setfp.s98 @ TEST3
100 .section .TEST3
132 @ CHECK: Name: .ARM.extab.TEST3
H A Deh-directive-setfp-diagnostics.s44 @ TEST3: .setfp with bad fp register
H A Deh-directive-save.s160 @ TEST3
162 .section .TEST3
206 @ CHECK: Name: .ARM.extab.TEST3

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