/external/valgrind/main/none/tests/mips64/ |
H A D | branch_and_jump_instructions.c | 152 #define TEST5(instruction, RDval, RSval, RD, RS) \ macro 231 TEST5("bgezal", 0, 0, 2, 3); 232 TEST5("bgezal", 1, 1, 3, 4); 233 TEST5("bgezal", 2, 0xffffffff, 4, 5); 234 TEST5("bgezal", 3, 0xffffffff, 5, 6); 235 TEST5("bgezal", 4, 0xfffffffe, 6, 7); 236 TEST5("bgezal", 5, 0xffffffff, 7, 8); 237 TEST5("bgezal", 6, 0x5, 8, 9); 238 TEST5("bgezal", 7, -3, 9, 10); 239 TEST5("bgeza [all...] |
H A D | fpu_load_store.c | 22 TEST5("ldxc1", i, reg_val1); 25 TEST5("ldxc1", i, reg_val2);
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H A D | move_instructions.c | 177 #define TEST5(instruction, RDval, RSval, RD, RS) \ macro 355 TEST5("movf", 0xaaaaaaaa, 0x80000000, t0, t1); 356 TEST5("movf", 0xccccffff, 0xffffffff, t1, t2); 357 TEST5("movf", 0xffffaaaa, 0xaaaaffff, t3, t1); 358 TEST5("movf", 0x0, 0xffffffff, t3, t0); 364 TEST5("movt", 0x0, 0xffffffff, t0, t1); 365 TEST5("movt", 0x11111111, 0xeeeeffff, t1, t2); 366 TEST5("movt", 0x5555ffff, 0xffffffff, t3, t1); 367 TEST5("movt", 0xeeeeeeee, 0xffffeeee, t3, t0);
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H A D | macro_load_store.h | 104 #define TEST5(instruction, offset, mem) \ macro
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H A D | macro_int.h | 71 #define TEST5(instruction, RSval, RTval, RS, RT) \ macro
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H A D | arithmetic_instruction.c | 210 TEST5("madd $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); 217 TEST5("maddu $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); 224 TEST5("msub $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1); 233 TEST5("msubu $t0, $t1", reg_val1[i], reg_val1[N-i-1], t0, t1);
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/external/clang/test/Frontend/ |
H A D | verify.c | 101 #ifdef TEST5
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/external/llvm/test/MC/AsmParser/ |
H A D | directive_ascii.s | 30 # CHECK: TEST5: 32 TEST5: label
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H A D | directive_values.s | 39 TEST5: label 41 # CHECK: TEST5:
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H A D | directive_fill.s | 37 # CHECK: TEST5 46 TEST5: label
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/external/clang/test/CXX/basic/basic.start/basic.start.main/ |
H A D | p2.cpp | 52 #elif TEST5
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/external/llvm/test/MC/ARM/ |
H A D | eh-directive-multiple-offsets.s | 131 @ TEST5: Check .setfp, .save, .setfp directive. 133 .section .TEST5 164 @ CHECK: Name: .ARM.extab.TEST5
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H A D | eh-directive-pad.s | 174 @ TEST5 176 .section .TEST5 221 @ CHECK: Name: .ARM.extab.TEST5
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H A D | eh-directive-setfp.s | 186 @ TEST5 188 .section .TEST5 234 @ CHECK: Name: .ARM.extab.TEST5
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H A D | eh-directive-setfp-diagnostics.s | 76 @ TEST5: .setfp with non-sp register as second operand
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H A D | eh-directive-save.s | 303 @ TEST5 305 .section .TEST5 338 @ CHECK: Name: .ARM.extab.TEST5
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