| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 879 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); local
880 if (!PPCEmitIntExt(MVT::i32, SrcReg, MVT::i64, TmpReg, !IsSigned))
882 SrcReg = TmpReg;
956 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); local
957 if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned))
960 SrcReg = TmpReg;
1054 unsigned TmpReg = createResultReg(&PPC::F8RCRegClass); local
1056 TII.get(TargetOpcode::COPY_TO_REGCLASS), TmpReg)
1058 SrcReg = TmpReg;
1264 unsigned TmpReg local
1276 unsigned TmpReg = createResultReg(RC); local
1587 unsigned TmpReg = createResultReg(RC); local
1596 unsigned TmpReg = createResultReg(RC); local
1831 unsigned TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); local
1935 unsigned TmpReg = createResultReg(RC); local
[all...] |
| H A D | PPCFrameLowering.cpp | 1474 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0; local
1488 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg)
1490 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg)
1491 .addReg(TmpReg, RegState::Kill)
1495 .addReg(TmpReg);
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| H A D | PPCISelLowering.cpp | 6281 unsigned TmpReg = (!BinOpcode) ? incr : local
6301 BuildMI(BB, dl, TII->get(BinOpcode), TmpReg).addReg(incr).addReg(dest);
6303 .addReg(TmpReg).addReg(ptrA).addReg(ptrB);
6364 unsigned TmpReg = (!BinOpcode) ? Incr2Reg : RegInfo.createVirtualRegister(RC); local
6422 BuildMI(BB, dl, TII->get(BinOpcode), TmpReg)
6427 .addReg(TmpReg).addReg(MaskReg);
6973 unsigned TmpReg = RegInfo.createVirtualRegister(RC); local
7045 BuildMI(BB, dl, TII->get(PPC::AND),TmpReg)
7048 .addReg(TmpReg).addReg(OldVal3Reg);
7075 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW),dest).addReg(TmpReg)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 290 unsigned TmpReg = MRI->createVirtualRegister( local
293 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID1, TmpReg)
305 MIB.addReg(TmpReg, getKillRegState(true))
308 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true));
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| H A D | Thumb1RegisterInfo.cpp | 626 unsigned TmpReg = MI.getOperand(0).getReg();
630 emitThumbRegPlusImmInReg(MBB, II, dl, TmpReg, FrameReg,
633 emitLoadConstPool(MBB, II, dl, TmpReg, 0, Offset);
637 emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII,
642 MI.getOperand(FIOperandNum).ChangeToRegister(TmpReg, false, false, true);
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 386 unsigned TmpReg = createResultReg(RC); local
387 EmitInst(Mips::LUi, TmpReg).addImm(Hi);
388 EmitInst(Mips::ORi, ResultReg).addReg(TmpReg).addImm(Lo);
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| H A D | MipsSEInstrInfo.cpp | 494 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; local
503 TmpReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo);
508 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc);
509 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill);
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 253 unsigned BaseReg, IndexReg, TmpReg, Scale; member in class:__anon26165::X86AsmParser::IntelExprStateMachine
262 State(IES_PLUS), PrevState(IES_ERROR), BaseReg(0), IndexReg(0), TmpReg(0),
358 BaseReg = TmpReg;
361 IndexReg = TmpReg;
395 BaseReg = TmpReg;
398 IndexReg = TmpReg;
428 TmpReg = Reg;
484 IndexReg = TmpReg;
573 BaseReg = TmpReg;
576 IndexReg = TmpReg;
1110 unsigned TmpReg; local
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2581 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> TmpReg; local
2582 OperandMatchResultTy ResTy = ParseAnyRegister(TmpReg);
2589 MipsOperand &FuncRegOpnd = static_cast<MipsOperand &>(*TmpReg[0]);
2597 TmpReg.clear();
2602 ResTy = ParseAnyRegister(TmpReg);
2615 MipsOperand &SaveOpnd = static_cast<MipsOperand &>(*TmpReg[0]);
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 1463 unsigned TmpReg = getRegForValue(BI->getCondition()); local
1464 if (TmpReg == 0)
1796 unsigned TmpReg = createResultReg(&X86::GR8RegClass); local
1797 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, TmpReg)
1808 unsigned TmpReg = getRegForValue(Cond); local
1809 if (TmpReg == 0)
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| H A D | X86ISelLowering.cpp | 17251 unsigned TmpReg = MRI.createVirtualRegister(AddrRegClass);
17254 BuildMI(overflowMBB, DL, TII->get(X86::ADD64ri32), TmpReg)
17259 .addReg(TmpReg)
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| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3038 unsigned TmpReg = UpdReg; local
3040 BuildMI(LoopMBB, DL, TII.get(SP::XORri), UpdReg).addReg(TmpReg).addImm(-1);
|