| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 340 BitVector &UsedRegs,
356 UsedRegs.set(*AI);
413 BitVector ModifiedRegs, UsedRegs;
415 UsedRegs.resize(TRI->getNumRegs());
451 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
459 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
466 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI);
473 !UsedRegs[MI->getOperand(0).getReg()]) {
482 !UsedRegs[FirstMI->getOperand(0).getReg()]) {
509 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TR
339 trackRegDefsUses(MachineInstr *MI, BitVector &ModifiedRegs, BitVector &UsedRegs, const TargetRegisterInfo *TRI) argument
[all...] |
| H A D | AArch64FastISel.cpp | 144 bool FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
1274 bool AArch64FastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, argument
1299 UsedRegs.push_back(RVLocs[0].getLocReg());
1417 SmallVector<unsigned, 4> UsedRegs; local
1418 if (!FinishCall(RetVT, UsedRegs, I, CC, NumBytes))
1422 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
|
| /external/llvm/lib/Target/R600/ |
| H A D | SIInsertWaits.cpp | 66 RegCounters UsedRegs; member in class:__anon26125::SIInsertWaits
239 UsedRegs[j] = LastIssued;
332 increaseCounters(Result, UsedRegs[j]);
357 memset(&UsedRegs, 0, sizeof(UsedRegs));
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCallingConvLower.h | 54 SmallVector<uint32_t, 16> UsedRegs; member in class:llvm::Hexagon_CCState
73 return UsedRegs[Reg/32] & (1 << (Reg&31));
|
| H A D | HexagonCallingConvLower.cpp | 34 UsedRegs.resize((TM.getRegisterInfo()->getNumRegs()+31)/32);
60 UsedRegs[*AI/32] |= 1 << (*AI&31);
|
| /external/llvm/lib/CodeGen/ |
| H A D | CallingConvLower.cpp | 36 UsedRegs.resize((TRI.getNumRegs()+31)/32);
61 UsedRegs[*AI/32] |= 1 << (*AI&31);
|
| H A D | MachineBasicBlock.cpp | 749 SmallVector<unsigned, 4> UsedRegs; local
761 if (std::find(UsedRegs.begin(), UsedRegs.end(), Reg) == UsedRegs.end())
762 UsedRegs.push_back(Reg);
902 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs);
|
| H A D | MachineInstr.cpp | 1828 void MachineInstr::setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs, argument
1841 for (ArrayRef<unsigned>::iterator I = UsedRegs.begin(), E = UsedRegs.end();
1854 for (ArrayRef<unsigned>::iterator I = UsedRegs.begin(), E = UsedRegs.end();
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 183 SmallVector<uint32_t, 16> UsedRegs; member in class:llvm::CCState
259 return UsedRegs[Reg/32] & (1 << (Reg&31));
|
| H A D | MachineInstr.h | 998 /// dead except those in the UsedRegs list.
1001 /// operands for all registers in UsedRegs.
1002 void setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs,
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 818 SmallVector<unsigned, 8> UsedRegs;
827 UsedRegs.push_back(Reg);
836 UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg());
844 UsedRegs.append(MCID.getImplicitUses(),
852 UsedRegs.push_back(Reg);
858 if (!UsedRegs.empty() || II.getImplicitDefs())
859 MIB->setPhysRegsDeadExcept(UsedRegs, *TRI);
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 208 bool FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
2017 bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, argument
2044 UsedRegs.push_back(RVLocs[0].getLocReg());
2045 UsedRegs.push_back(RVLocs[1].getLocReg());
2063 UsedRegs.push_back(RVLocs[0].getLocReg());
2263 SmallVector<unsigned, 4> UsedRegs; local
2264 if (!FinishCall(RetVT, UsedRegs, I, CC, NumBytes, false)) return false;
2267 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2414 SmallVector<unsigned, 4> UsedRegs; local
2415 if (!FinishCall(RetVT, UsedRegs,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 175 void finishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
1308 void PPCFastISel::finishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, argument
1366 UsedRegs.push_back(SourcePhysReg);
1506 SmallVector<unsigned, 4> UsedRegs; local
1507 finishCall(RetVT, UsedRegs, I, CC, NumBytes, IsVarArg);
1510 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 3056 SmallVector<unsigned, 4> UsedRegs; local
3081 UsedRegs.push_back(RVLocs[i].getLocReg());
3105 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
|