Searched refs:VT (Results 1 - 25 of 188) sorted by relevance

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/external/llvm/lib/Target/X86/Utils/
H A DX86ShuffleDecode.h39 void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
41 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
43 void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
47 /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
50 void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
53 /// and punpckh*. VT indicates the type of the vector allowing it to handle
55 void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
58 /// and punpckl*. VT indicates the type of the vector allowing it to handle
60 void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
63 void DecodeVPERM2X128Mask(MVT VT, unsigne
[all...]
H A DX86ShuffleDecode.cpp65 void DecodePALIGNRMask(MVT VT, unsigned Imm, argument
67 unsigned NumElts = VT.getVectorNumElements();
68 unsigned Offset = Imm * (VT.getVectorElementType().getSizeInBits() / 8);
70 unsigned NumLanes = VT.getSizeInBits() / 128;
84 /// VT indicates the type of the vector allowing it to handle different
86 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { argument
87 unsigned NumElts = VT.getVectorNumElements();
89 unsigned NumLanes = VT.getSizeInBits() / 128;
102 void DecodePSHUFHWMask(MVT VT, unsigned Imm, argument
104 unsigned NumElts = VT
118 DecodePSHUFLWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
137 DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
159 DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) argument
179 DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) argument
196 DecodeVPERM2X128Mask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
[all...]
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp881 EVT VT = N->getValueType(0); local
896 return CurDAG->getMachineNode(Opc, dl, VT, Ops);
903 EVT VT = LD->getMemoryVT();
915 if (VT == MVT::i64)
917 else if (VT == MVT::i32) {
929 } else if (VT == MVT::i16) {
942 } else if (VT == MVT::i8) {
955 } else if (VT == MVT::f32) {
957 } else if (VT == MVT::f64 || VT
993 EVT VT = N->getValueType(0); local
1017 EVT VT = N->getValueType(0); local
1052 EVT VT = N->getOperand(2)->getValueType(0); local
1071 EVT VT = N->getOperand(2)->getValueType(0); local
1100 EVT VT = V64Reg.getValueType(); local
1115 EVT VT = V128Reg.getValueType(); local
1127 EVT VT = N->getValueType(0); local
1172 EVT VT = N->getValueType(0); local
1230 EVT VT = N->getOperand(2)->getValueType(0); local
1263 EVT VT = N->getOperand(2)->getValueType(0); local
1306 EVT VT = N->getValueType(0); local
1434 EVT VT = N->getValueType(0); local
1560 isBitfieldDstMask(uint64_t DstMask, APInt BitsToBeInserted, unsigned NumberOfIgnoredHighBits, EVT VT) argument
1783 EVT VT = Op.getValueType(); local
1837 EVT VT = N->getValueType(0); local
1889 EVT VT = OrOpd1->getValueType(0); local
1945 EVT VT = N->getValueType(0); local
2057 EVT VT = Node->getValueType(0); local
[all...]
H A DAArch64ISelLowering.cpp441 for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
442 VT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) {
444 setOperationAction(ISD::SIGN_EXTEND_INREG, (MVT::SimpleValueType)VT,
447 setOperationAction(ISD::MULHS, (MVT::SimpleValueType)VT, Expand);
448 setOperationAction(ISD::SMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
449 setOperationAction(ISD::MULHU, (MVT::SimpleValueType)VT, Expand);
450 setOperationAction(ISD::UMUL_LOHI, (MVT::SimpleValueType)VT, Expand);
452 setOperationAction(ISD::BSWAP, (MVT::SimpleValueType)VT, Expand);
456 setTruncStoreAction((MVT::SimpleValueType)VT,
481 addTypeForNEON(EVT VT, EVT PromotedBitwiseVT) argument
549 addDRTypeForNEON(MVT VT) argument
554 addQRTypeForNEON(MVT VT) argument
590 EVT VT = cast<MemIntrinsicSDNode>(Op)->getMemoryVT(); local
610 MVT VT = Op.getOperand(1).getValueType().getSimpleVT(); local
979 EVT VT = LHS.getValueType(); local
1023 EVT VT = RHS.getValueType(); local
1266 EVT VT = Op.getValueType(); local
1390 EVT VT = Op.getValueType(); local
1438 EVT VT = Op.getValueType(); local
2958 EVT VT = Op.getValueType(); local
3054 EVT VT = Op.getValueType(); local
3087 EVT VT = Op.getValueType(); local
3323 EVT VT = Op.getValueType(); local
3330 EVT VT = Op.getValueType(); local
3588 EVT VT = Op.getValueType(); local
3650 EVT VT = Op.getValueType(); local
3679 EVT VT = Op.getValueType(); local
3700 EVT VT = Op.getValueType(); local
3746 EVT VT = Op.getValueType(); local
4082 EVT VT = V64Reg.getValueType(); local
4102 EVT VT = V128Reg.getValueType(); local
4117 EVT VT = Op.getValueType(); local
4265 isSingletonEXTMask(ArrayRef<int> M, EVT VT, unsigned &Imm) argument
4296 isEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseEXT, unsigned &Imm) argument
4338 isREVMask(ArrayRef<int> M, EVT VT, unsigned BlockSize) argument
4365 isZIPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument
4379 isUZPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument
4392 isTRNMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument
4406 isZIP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument
4423 isUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument
4442 isTRN_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) argument
4492 isConcatMask(ArrayRef<int> Mask, EVT VT, bool SplitLHS) argument
4514 EVT VT = Op.getValueType(); local
4578 EVT VT = OpLHS.getValueType(); local
4722 EVT VT = Op.getValueType(); local
4875 EVT VT = BVN->getValueType(0); local
4901 EVT VT = Op.getValueType(); local
5027 EVT VT = N->getValueType(0); local
5099 EVT VT = Op.getValueType(); local
5194 EVT VT = Op.getValueType(); local
5216 EVT VT = Op.getValueType(); local
5653 EVT VT = Op.getOperand(0).getValueType(); local
5753 isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) argument
5767 isVShiftRImm(SDValue Op, EVT VT, bool isNarrow, bool isIntrinsic, int64_t &Cnt) argument
5780 EVT VT = Op.getValueType(); local
5826 EmitVectorComparison(SDValue LHS, SDValue RHS, AArch64CC::CondCode CC, bool NoNans, EVT VT, SDLoc dl, SelectionDAG &DAG) argument
6287 EVT VT = N->getValueType(0); local
6326 EVT VT = N->getValueType(0); local
6375 EVT VT = N->getValueType(0); local
6421 EVT VT = N->getValueType(0); local
6481 EVT VT = N->getValueType(0); local
6519 EVT VT = N->getValueType(0); local
6570 EVT VT = N->getValueType(0); local
6661 EVT VT = N->getValueType(0); local
6928 EVT VT = Op->getValueType(0); local
7239 EVT VT = StVal.getValueType(); local
7316 EVT VT = StVal.getValueType(); local
7368 EVT VT = N->getValueType(0); local
7850 EVT VT; local
7871 EVT VT; local
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.cpp106 EVT VT = Op.getValueType(); local
113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1));
119 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1));
121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1),
127 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1),
130 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1),
133 return DAG.getNode(AMDGPUISD::FMIN, DL, VT, Op.getOperand(1),
136 return DAG.getNode(AMDGPUISD::SMIN, DL, VT, O
154 EVT VT = Op.getValueType(); local
167 EVT VT = Op.getValueType(); local
184 EVT VT = Op.getValueType(); local
[all...]
H A DSIRegisterInfo.cpp53 MVT VT) const
55 switch(VT.SimpleTy) {
H A DR600ISelLowering.cpp277 EVT VT = Op.getValueType(); local
284 return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass, Reg, VT);
288 return LowerImplicitParameter(DAG, VT, DL, 0);
290 return LowerImplicitParameter(DAG, VT, DL, 1);
292 return LowerImplicitParameter(DAG, VT, DL, 2);
294 return LowerImplicitParameter(DAG, VT, DL, 3);
296 return LowerImplicitParameter(DAG, VT, DL, 4);
298 return LowerImplicitParameter(DAG, VT, DL, 5);
300 return LowerImplicitParameter(DAG, VT, DL, 6);
302 return LowerImplicitParameter(DAG, VT, D
357 LowerImplicitParameter(SelectionDAG &DAG, EVT VT, DebugLoc DL, unsigned DwordOffset) const argument
377 EVT VT = Op.getValueType(); local
390 EVT VT = Op.getValueType(); local
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H A DSIRegisterInfo.h48 virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const;
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.cpp106 EVT VT = Op.getValueType(); local
113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1));
119 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1));
121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1),
127 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1),
130 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1),
133 return DAG.getNode(AMDGPUISD::FMIN, DL, VT, Op.getOperand(1),
136 return DAG.getNode(AMDGPUISD::SMIN, DL, VT, O
154 EVT VT = Op.getValueType(); local
167 EVT VT = Op.getValueType(); local
184 EVT VT = Op.getValueType(); local
[all...]
H A DSIRegisterInfo.cpp53 MVT VT) const
55 switch(VT.SimpleTy) {
H A DR600ISelLowering.cpp277 EVT VT = Op.getValueType(); local
284 return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass, Reg, VT);
288 return LowerImplicitParameter(DAG, VT, DL, 0);
290 return LowerImplicitParameter(DAG, VT, DL, 1);
292 return LowerImplicitParameter(DAG, VT, DL, 2);
294 return LowerImplicitParameter(DAG, VT, DL, 3);
296 return LowerImplicitParameter(DAG, VT, DL, 4);
298 return LowerImplicitParameter(DAG, VT, DL, 5);
300 return LowerImplicitParameter(DAG, VT, DL, 6);
302 return LowerImplicitParameter(DAG, VT, D
357 LowerImplicitParameter(SelectionDAG &DAG, EVT VT, DebugLoc DL, unsigned DwordOffset) const argument
377 EVT VT = Op.getValueType(); local
390 EVT VT = Op.getValueType(); local
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H A DSIRegisterInfo.h48 virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const;
/external/llvm/include/llvm/CodeGen/
H A DValueTypes.h42 bool operator==(EVT VT) const {
43 return !(*this != VT);
45 bool operator!=(EVT VT) const {
46 if (V.SimpleTy != VT.V.SimpleTy)
49 return LLVMTy != VT.LLVMTy;
70 /// length, where each element is of type VT.
71 static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements) { argument
72 MVT M = MVT::getVectorVT(VT.V, NumElements);
75 return getExtendedVectorVT(Context, VT, NumElements);
89 "Simple vector VT no
[all...]
H A DSelectionDAG.h52 SDVTListNode(const FoldingSetNodeIDRef ID, const EVT *VT, unsigned int Num) : argument
53 FastID(ID), VTs(VT), NumVTs(Num) {
390 SDVTList getVTList(EVT VT);
399 SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false,
401 SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false,
403 SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false,
406 SDValue getTargetConstant(uint64_t Val, EVT VT, bool isOpaque = false) { argument
407 return getConstant(Val, VT, true, isOpaque);
409 SDValue getTargetConstant(const APInt &Val, EVT VT, bool isOpaque = false) { argument
410 return getConstant(Val, VT, tru
412 getTargetConstant(const ConstantInt &Val, EVT VT, bool isOpaque = false) argument
421 getTargetConstantFP(double Val, EVT VT) argument
424 getTargetConstantFP(const APFloat& Val, EVT VT) argument
427 getTargetConstantFP(const ConstantFP &Val, EVT VT) argument
433 getTargetGlobalAddress(const GlobalValue *GV, SDLoc DL, EVT VT, int64_t offset = 0, unsigned char TargetFlags = 0) argument
439 getTargetFrameIndex(int FI, EVT VT) argument
444 getTargetJumpTable(int JTI, EVT VT, unsigned char TargetFlags = 0) argument
450 getTargetConstantPool(const Constant *C, EVT VT, unsigned Align = 0, int Offset = 0, unsigned char TargetFlags = 0) argument
458 getTargetConstantPool(MachineConstantPoolValue *C, EVT VT, unsigned Align = 0, int Offset = 0, unsigned char TargetFlags=0) argument
480 getTargetBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset = 0, unsigned char TargetFlags = 0) argument
511 getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT) argument
520 getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT, SDValue Glue) argument
542 getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, ArrayRef<int> MaskElts) argument
619 getUNDEF(EVT VT) argument
625 getGLOBAL_OFFSET_TABLE(EVT VT) argument
684 getSetCC(SDLoc DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond) argument
697 getSelect(SDLoc DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS) argument
1043 EVTToAPFloatSemantics(EVT VT) argument
[all...]
/external/llvm/include/llvm/Target/
H A DTargetLowering.h190 getPreferredVectorAction(EVT VT) const {
192 if (VT.getVectorNumElements() == 1)
208 shouldExpandBuildVectorWithShuffles(EVT /* VT */,
269 virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const;
314 virtual const TargetRegisterClass *getRegClassFor(MVT VT) const {
315 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
327 virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const {
328 const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy];
334 virtual uint8_t getRepRegClassCostFor(MVT VT) const {
335 return RepRegClassCostForVT[VT
361 setTypeAction(MVT VT, LegalizeTypeAction Action) argument
1074 addRegisterClass(MVT VT, const TargetRegisterClass *RC) argument
1102 setOperationAction(unsigned Op, MVT VT, LegalizeAction Action) argument
[all...]
/external/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp72 bool EmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
74 bool EmitStore(MVT VT, unsigned SrcReg, Address &Addr,
80 bool isTypeLegal(Type *Ty, MVT &VT);
81 bool isLoadTypeLegal(Type *Ty, MVT &VT);
83 unsigned MaterializeFP(const ConstantFP *CFP, MVT VT);
84 unsigned MaterializeGV(const GlobalValue *GV, MVT VT);
85 unsigned MaterializeInt(const Constant *C, MVT VT);
119 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) { argument
124 VT = evt.getSimpleVT();
128 return TLI.isTypeLegal(VT);
131 isLoadTypeLegal(Type *Ty, MVT &VT) argument
155 EmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, unsigned Alignment) argument
214 EmitStore(MVT VT, unsigned SrcReg, Address &Addr, unsigned Alignment) argument
322 MaterializeFP(const ConstantFP *CFP, MVT VT) argument
342 MaterializeGV(const GlobalValue *GV, MVT VT) argument
357 MaterializeInt(const Constant *C, MVT VT) argument
[all...]
/external/llvm/lib/CodeGen/
H A DCallingConvLower.cpp72 MVT ArgVT = Ins[i].VT;
90 MVT VT = Outs[i].VT; local
92 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
104 MVT VT = Outs[i].VT; local
106 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
109 << EVT(VT)
158 MVT VT = Ins[i].VT; local
172 AnalyzeCallResult(MVT VT, CCAssignFn Fn) argument
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.cpp81 EVT ArgVT = Ins[i].VT;
117 EVT VT = Outs[i].VT; local
119 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){
121 << VT.getEVTString() << "\n";
147 EVT ArgVT = Outs[i].VT;
185 EVT VT = Ins[i].VT; local
187 if (Fn(i, VT, V
197 AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn) argument
[all...]
/external/llvm/lib/Target/R600/
H A DSIISelLowering.h24 SDValue LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, SDLoc DL,
51 bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AS,
55 getPreferredVectorAction(EVT VT) const override;
68 EVT getSetCCResultType(LLVMContext &Context, EVT VT) const override;
69 MVT getScalarShiftAmountTy(EVT VT) const override;
70 bool isFMAFasterThanFMulAndFAdd(EVT VT) const override;
79 unsigned Reg, EVT VT) const override;
H A DAMDGPUISelLowering.cpp88 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) { argument
89 unsigned StoreSize = VT.getStoreSizeInBits();
98 EVT AMDGPUTargetLowering::getEquivalentLoadRegType(LLVMContext &Ctx, EVT VT) { argument
99 unsigned StoreSize = VT.getStoreSizeInBits();
246 for (MVT VT : ScalarIntVTs) {
247 setOperationAction(ISD::SREM, VT, Expand);
248 setOperationAction(ISD::SDIV, VT, Expand);
251 setOperationAction(ISD::SDIVREM, VT, Custom);
252 setOperationAction(ISD::UDIVREM, VT, Custom);
255 setOperationAction(ISD::SMUL_LOHI, VT, Expan
603 EVT VT = EVT::getEVT(InitTy); local
611 EVT VT = EVT::getEVT(CFP->getType()); local
660 EVT VT = EVT::getEVT(InitTy); local
759 EVT VT = Op.getValueType(); local
785 EVT VT = Op.getValueType(); local
924 EVT VT = Op.getValueType(); local
936 EVT VT = Op.getValueType(); local
951 EVT VT = N->getValueType(0); local
1054 EVT VT = Value.getValueType(); local
1127 EVT VT = Op.getValueType(); local
1527 EVT VT = Op.getValueType(); local
1631 EVT VT = Op.getValueType(); local
1821 MVT VT = Op.getSimpleValueType(); local
1833 MVT VT = Op.getSimpleValueType(); local
1860 EVT VT = Op.getValueType(); local
1867 EVT VT = Op.getValueType(); local
1880 EVT VT = Op.getValueType(); local
1902 EVT VT = N->getValueType(0); local
2050 EVT VT; local
[all...]
H A DR600RegisterInfo.h38 const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const override;
/external/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp295 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
304 SDValue CombineConsecutiveLoads(SDNode *N, EVT VT);
378 /// legalization or if the specified VT is legal.
379 bool isTypeLegal(const EVT &VT) { argument
381 return TLI.isTypeLegal(VT);
386 EVT getSetCCResultType(EVT VT) const {
387 return TLI.getSetCCResultType(*DAG.getContext(), VT);
674 EVT VT = N0.getValueType(); local
679 SDValue OpNode = DAG.FoldConstantArithmetic(Opc, VT, L, R);
682 return DAG.getNode(Opc, DL, VT, N
812 EVT VT = Load->getValueType(0); local
1462 EVT VT = N0.getValueType(); local
1486 EVT VT = N0.getValueType(); local
1658 EVT VT = N0.getValueType(); local
1715 tryFoldToZero(SDLoc DL, const TargetLowering &TLI, EVT VT, SelectionDAG &DAG, bool LegalOperations, bool LegalTypes) argument
1732 EVT VT = N0.getValueType(); local
1823 EVT VT = N0.getValueType(); local
1866 EVT VT = N0.getValueType(); local
1988 EVT VT = N->getValueType(0); local
2073 EVT VT = N->getValueType(0); local
2125 EVT VT = N->getValueType(0); local
2167 EVT VT = N->getValueType(0); local
2219 EVT VT = N->getValueType(0); local
2257 EVT VT = N->getValueType(0); local
2443 EVT VT = N0.getValueType(); local
2596 EVT VT = N1.getValueType(); local
2694 EVT VT = Vector->getValueType(0); local
3234 EVT VT = N1.getValueType(); local
3578 EVT VT = Shifted.getValueType(); local
3593 EVT VT = LHS.getValueType(); local
3701 EVT VT = N0.getValueType(); local
3949 EVT VT = N0.getValueType(); local
4118 EVT VT = N0.getValueType(); local
4264 EVT VT = N0.getValueType(); local
4456 EVT VT = N->getValueType(0); local
4466 EVT VT = N->getValueType(0); local
4476 EVT VT = N->getValueType(0); local
4486 EVT VT = N->getValueType(0); local
4496 EVT VT = N->getValueType(0); local
4511 EVT VT = N->getValueType(0); local
4619 MVT VT = N->getSimpleValueType(0); local
4688 EVT VT = LHS.getValueType(); local
4704 EVT VT = N->getValueType(0); local
4805 EVT VT = N->getValueType(0); local
4940 EVT VT = N->getValueType(0); local
5197 EVT VT = N->getValueType(0); local
5467 EVT VT = N->getValueType(0); local
5670 EVT VT = N->getValueType(0); local
5831 EVT VT = N->getValueType(0); local
5959 EVT VT = N->getValueType(0); local
6148 CombineConsecutiveLoads(SDNode *N, EVT VT) argument
6181 EVT VT = N->getValueType(0); local
6327 EVT VT = N->getValueType(0); local
6347 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, local
6423 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, Ops.size()); local
6431 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, local
6468 EVT VT = N->getValueType(0); local
6678 EVT VT = N->getValueType(0); local
6769 EVT VT = N->getValueType(0); local
6834 EVT VT = N->getValueType(0); local
6908 EVT VT = N->getValueType(0); local
6962 EVT VT = N->getValueType(0); local
6976 EVT VT = N->getValueType(0); local
7024 EVT VT = N->getValueType(0); local
7077 EVT VT = N->getValueType(0); local
7117 EVT VT = N->getValueType(0); local
7129 EVT VT = N->getValueType(0); local
7142 EVT VT = N->getValueType(0); local
7175 EVT VT = N->getValueType(0); local
7191 EVT VT = N->getValueType(0); local
7236 EVT VT = N->getValueType(0); local
7285 EVT VT = N->getValueType(0); local
7297 EVT VT = N->getValueType(0); local
7309 EVT VT = N->getValueType(0); local
7321 EVT VT = N->getValueType(0); local
7544 EVT VT; local
7591 EVT VT; local
7818 EVT VT; local
8753 EVT VT = Value.getValueType(); local
8877 EVT VT = LD->getMemoryVT(); local
9865 EVT VT = InVec.getValueType(); local
10046 EVT VT = N->getValueType(0); local
10212 EVT VT = N->getValueType(0); local
10382 EVT VT = N->getValueType(0); local
10518 EVT VT = N->getValueType(0); local
10568 EVT VT = N->getValueType(0); local
10779 EVT VT = N->getValueType(0); local
10802 EVT VT = N->getValueType(0); local
10878 EVT VT = LHSOp.getValueType(); local
10917 EVT VT = N->getValueType(0); local
11398 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, SDLoc DL, bool foldBooleans) argument
[all...]
H A DSelectionDAG.cpp77 bool ConstantFPSDNode::isValueValidForType(EVT VT, argument
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
84 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
730 EVT VT = cast<VTSDNode>(N)->getVT(); local
731 if (VT.isExtended()) {
732 Erased = ExtendedValueTypeNodes.erase(VT);
734 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
735 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
849 EVT VT = N->getValueType(0); local
851 assert(!VT
997 getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) argument
1003 getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) argument
1009 getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) argument
1015 getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT, EVT OpVT) argument
1024 getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) argument
1036 getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) argument
1046 getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) argument
1056 getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) argument
1068 getNOT(SDLoc DL, SDValue Val, EVT VT) argument
1075 getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) argument
1091 getConstant(uint64_t Val, EVT VT, bool isT, bool isO) argument
1099 getConstant(const APInt &Val, EVT VT, bool isT, bool isO) argument
1104 getConstant(const ConstantInt &Val, EVT VT, bool isT, bool isO) argument
1205 getConstantFP(const APFloat& V, EVT VT, bool isTarget) argument
1209 getConstantFP(const ConstantFP& V, EVT VT, bool isTarget) argument
1243 getConstantFP(double Val, EVT VT, bool isTarget) argument
1260 getGlobalAddress(const GlobalValue *GV, SDLoc DL, EVT VT, int64_t Offset, bool isTargetGA, unsigned char TargetFlags) argument
1297 getFrameIndex(int FI, EVT VT, bool isTarget) argument
1312 getJumpTable(int JTI, EVT VT, bool isTarget, unsigned char TargetFlags) argument
1332 getConstantPool(const Constant *C, EVT VT, unsigned Alignment, int Offset, bool isTarget, unsigned char TargetFlags) argument
1360 getConstantPool(MachineConstantPoolValue *C, EVT VT, unsigned Alignment, int Offset, bool isTarget, unsigned char TargetFlags) argument
1387 getTargetIndex(int Index, EVT VT, int64_t Offset, unsigned char TargetFlags) argument
1419 getValueType(EVT VT) argument
1433 getExternalSymbol(const char *Sym, EVT VT) argument
1441 getTargetExternalSymbol(const char *Sym, EVT VT, unsigned char TargetFlags) argument
1479 getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, const int *Mask) argument
1601 getConvertRndSat(EVT VT, SDLoc dl, SDValue Val, SDValue DTy, SDValue STy, SDValue Rnd, SDValue Sat, ISD::CvtCode Code) argument
1626 getRegister(unsigned RegNo, EVT VT) argument
1671 getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset, bool isTarget, unsigned char TargetFlags) argument
1728 getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr, unsigned SrcAS, unsigned DestAS) argument
1761 CreateStackTemporary(EVT VT, unsigned minAlign) argument
1790 FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, SDLoc dl) argument
2157 EVT VT = LD->getMemoryVT(); local
2221 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); local
2361 EVT VT = Op.getValueType(); local
2647 getNode(unsigned Opcode, SDLoc DL, EVT VT) argument
2665 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue Operand) argument
2941 FoldConstantArithmetic(unsigned Opcode, EVT VT, SDNode *Cst1, SDNode *Cst2) argument
3067 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, bool nuw, bool nsw, bool exact) argument
3536 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3) argument
3643 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument
3650 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument
3681 getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, SDLoc dl) argument
3708 getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG, const TargetLowering &TLI, StringRef Str) argument
3752 EVT VT = Base.getValueType(); local
3798 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, local
3947 EVT VT = MemOps[i]; local
4050 EVT VT = MemOps[i]; local
4065 EVT VT = MemOps[i]; local
4148 EVT VT = MemOps[i]; local
4506 EVT VT = Val.getValueType(); local
4514 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument
4635 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo, const MDNode *Ranges) argument
4668 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO) argument
4716 getLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo, const MDNode *Ranges) argument
4729 getLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO) argument
4737 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, unsigned Alignment, const MDNode *TBAAInfo) argument
4749 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO) argument
4800 EVT VT = Val.getValueType(); local
4853 EVT VT = Val.getValueType(); local
4919 getVAArg(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align) argument
4927 getNode(unsigned Opcode, SDLoc DL, EVT VT, ArrayRef<SDUse> Ops) argument
4943 getNode(unsigned Opcode, SDLoc DL, EVT VT, ArrayRef<SDValue> Ops) argument
5120 getVTList(EVT VT) argument
5334 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT) argument
5340 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1) argument
5347 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2) argument
5355 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument
5363 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, ArrayRef<SDValue> Ops) argument
5553 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) argument
5559 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) argument
5566 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2) argument
5574 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument
5582 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, ArrayRef<SDValue> Ops) argument
5715 getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, SDValue Operand) argument
5726 getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, SDValue Operand, SDValue Subreg) argument
6199 GlobalAddressSDNode(unsigned Opc, unsigned Order, DebugLoc DL, const GlobalValue *GA, EVT VT, int64_t o, unsigned char TF) argument
6206 AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT, SDValue X, unsigned SrcAS, unsigned DestAS) argument
6257 getValueTypeList(EVT VT) argument
6409 EVT VT = N->getValueType(0); local
6595 EVT VT = Op.getValueType(); local
6626 EVT VT = getValueType(0); local
6734 isSplatMask(const int *Mask, EVT VT) argument
[all...]
H A DLegalizeVectorOps.cpp359 MVT VT = Op.getSimpleValueType(); local
362 MVT NVT = TLI.getTypeToPromoteTo(Op.getOpcode(), VT);
375 return DAG.getNode(ISD::BITCAST, dl, VT, Op);
381 EVT VT = Op.getOperand(0).getValueType(); local
393 EVT NVT = VT.widenIntegerVectorElementType(*DAG.getContext());
417 EVT VT = Op.getValueType(); local
422 NewVT = VT.widenIntegerVectorElementType(*DAG.getContext());
436 return DAG.getNode(ISD::TRUNCATE, SDLoc(Op), VT, promoted);
667 EVT VT = Op.getValueType(); local
674 assert(VT
721 EVT VT = Op.getValueType(); local
744 EVT VT = Op.getValueType(); local
767 EVT VT = Op.getValueType(); local
791 EVT VT = Op.getValueType(); local
820 EVT VT = Op.getValueType(); local
851 EVT VT = Mask.getValueType(); local
890 EVT VT = Op.getOperand(0).getValueType(); local
939 EVT VT = Op.getValueType(); local
[all...]
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp73 static SDValue getMOVL(SelectionDAG &DAG, SDLoc dl, EVT VT, SDValue V1,
81 EVT VT = Vec.getValueType(); local
82 EVT ElVT = VT.getVectorElementType();
83 unsigned Factor = VT.getSizeInBits()/vectorWidth;
85 VT.getVectorNumElements()/Factor);
140 EVT VT = Vec.getValueType();
141 EVT ElVT = VT.getVectorElementType();
180 static SDValue Concat128BitVectors(SDValue V1, SDValue V2, EVT VT, argument
183 SDValue V = Insert128BitVector(DAG.getUNDEF(VT), V1, 0, DAG, dl);
187 static SDValue Concat256BitVectors(SDValue V1, SDValue V2, EVT VT, argument
434 MVT VT = IntVTs[i]; local
603 MVT VT = IntVTs[i]; local
806 MVT VT = (MVT::SimpleValueType)i; local
986 MVT VT = (MVT::SimpleValueType)i; local
1012 MVT VT = (MVT::SimpleValueType)i; local
1287 MVT VT = (MVT::SimpleValueType)i; local
1309 MVT VT = (MVT::SimpleValueType)i; local
1455 MVT VT = (MVT::SimpleValueType)i; local
1481 MVT VT = (MVT::SimpleValueType)i; local
1515 MVT VT = IntVTs[i]; local
1729 allowsUnalignedMemoryAccesses(EVT VT, unsigned, bool *Fast) const argument
2019 getTypeForExtArgOrReturn(MVT VT, ISD::NodeType ExtendKind) const argument
2539 EVT VT = getPointerTy(); local
3389 getTargetShuffleNode(unsigned Opc, SDLoc dl, EVT VT, SDValue V1, SelectionDAG &DAG) argument
3400 getTargetShuffleNode(unsigned Opc, SDLoc dl, EVT VT, SDValue V1, unsigned TargetMask, SelectionDAG &DAG) argument
3414 getTargetShuffleNode(unsigned Opc, SDLoc dl, EVT VT, SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) argument
3427 getTargetShuffleNode(unsigned Opc, SDLoc dl, EVT VT, SDValue V1, SDValue V2, SelectionDAG &DAG) argument
3692 isPSHUFDMask(ArrayRef<int> Mask, MVT VT) argument
3702 isPSHUFHWMask(ArrayRef<int> Mask, MVT VT, bool HasInt256) argument
3731 isPSHUFLWMask(ArrayRef<int> Mask, MVT VT, bool HasInt256) argument
3760 isPALIGNRMask(ArrayRef<int> Mask, MVT VT, const X86Subtarget *Subtarget) argument
3850 isSHUFPMask(ArrayRef<int> Mask, MVT VT, bool Commuted = false) argument
3909 isMOVHLPSMask(ArrayRef<int> Mask, MVT VT) argument
3928 isMOVHLPS_v_undef_Mask(ArrayRef<int> Mask, MVT VT) argument
3945 isMOVLPMask(ArrayRef<int> Mask, MVT VT) argument
3967 isMOVLHPSMask(ArrayRef<int> Mask, MVT VT) argument
3990 isINSERTPSMask(ArrayRef<int> Mask, MVT VT) argument
4024 MVT VT = SVOp->getSimpleValueType(0); local
4067 isUNPCKLMask(ArrayRef<int> Mask, MVT VT, bool HasInt256, bool V2IsSplat = false) argument
4115 isUNPCKHMask(ArrayRef<int> Mask, MVT VT, bool HasInt256, bool V2IsSplat = false) argument
4163 isUNPCKL_v_undef_Mask(ArrayRef<int> Mask, MVT VT, bool HasInt256) argument
4206 isUNPCKH_v_undef_Mask(ArrayRef<int> Mask, MVT VT, bool HasInt256) argument
4239 isINSERT64x4Mask(ArrayRef<int> Mask, MVT VT, unsigned int *Imm) argument
4263 isMOVLMask(ArrayRef<int> Mask, EVT VT) argument
4287 isVPERM2X128Mask(ArrayRef<int> Mask, MVT VT, bool HasFp256) argument
4319 MVT VT = SVOp->getSimpleValueType(0); local
4341 isPermImmMask(ArrayRef<int> Mask, MVT VT, unsigned& Imm8) argument
4385 isVPERMILPMask(ArrayRef<int> Mask, MVT VT) argument
4417 isCommutedMOVLMask(ArrayRef<int> Mask, MVT VT, bool V2IsSplat = false, bool V2IsUndef = false) argument
4441 isMOVSHDUPMask(ArrayRef<int> Mask, MVT VT, const X86Subtarget *Subtarget) argument
4465 isMOVSLDUPMask(ArrayRef<int> Mask, MVT VT, const X86Subtarget *Subtarget) argument
4489 isMOVDDUPYMask(ArrayRef<int> Mask, MVT VT, bool HasFp256) argument
4509 isMOVDDUPMask(ArrayRef<int> Mask, MVT VT) argument
4535 MVT VT = N->getSimpleValueType(0); local
4553 MVT VT = N->getSimpleValueType(0); local
4580 MVT VT = N->getSimpleValueType(0); local
4610 MVT VT = N->getSimpleValueType(0); local
4634 MVT VT = N->getSimpleValueType(0); local
4658 MVT VT = SVOp->getSimpleValueType(0); local
4758 MVT VT = SVOp->getSimpleValueType(0); local
4780 ShouldXformToMOVHLPS(ArrayRef<int> Mask, MVT VT) argument
4836 ShouldXformToMOVLP(SDNode *V1, SDNode *V2, ArrayRef<int> Mask, MVT VT) argument
4891 getZeroVector(EVT VT, const X86Subtarget *Subtarget, SelectionDAG &DAG, SDLoc dl) argument
4938 getOnesVector(MVT VT, bool HasInt256, SelectionDAG &DAG, SDLoc dl) argument
4972 getMOVL(SelectionDAG &DAG, SDLoc dl, EVT VT, SDValue V1, SDValue V2) argument
4983 getUnpackl(SelectionDAG &DAG, SDLoc dl, MVT VT, SDValue V1, SDValue V2) argument
4995 getUnpackh(SelectionDAG &DAG, SDLoc dl, MVT VT, SDValue V1, SDValue V2) argument
5011 MVT VT = V.getSimpleValueType(); local
5029 MVT VT = V.getSimpleValueType(); local
5100 MVT VT = V2.getSimpleValueType(); local
5114 getTargetShuffleMask(SDNode *N, MVT VT, SmallVectorImpl<int> &Mask, bool &IsUnary) argument
5200 EVT VT = V.getValueType(); local
5536 EVT VT = Op.getSimpleValueType(); local
5553 getVShift(bool isLeft, EVT VT, SDValue SrcOp, unsigned NumBits, SelectionDAG &DAG, const TargetLowering &TLI, SDLoc dl) argument
5567 LowerAsSplatVectorLoad(SDValue SrcOp, MVT VT, SDLoc dl, SelectionDAG &DAG) argument
5649 EltsFromConsecutiveLoads(EVT VT, SmallVectorImpl<SDValue> &Elts, SDLoc &DL, SelectionDAG &DAG, bool isAfterLegalize) argument
5920 MVT VT = Op.getSimpleValueType(); local
5995 MVT VT = Op.getSimpleValueType(); local
6089 EVT VT = N->getValueType(0); local
6197 EVT VT = V0.getValueType(); local
6236 EVT VT = BV->getValueType(0); local
6355 EVT VT = N->getValueType(0); local
6502 MVT VT = Op.getSimpleValueType(); local
6873 MVT LLVM_ATTRIBUTE_UNUSED VT = Op.getSimpleValueType(); local
[all...]

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