| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 653 static unsigned int getVCmpInst(MVT::SimpleValueType VecVT, ISD::CondCode CC, argument
660 if (VecVT == MVT::v16i8)
662 else if (VecVT == MVT::v8i16)
664 else if (VecVT == MVT::v4i32)
667 else if (VecVT == MVT::v4f32)
669 else if (VecVT == MVT::v2f64)
676 if (VecVT == MVT::v16i8)
678 else if (VecVT == MVT::v8i16)
680 else if (VecVT == MVT::v4i32)
682 else if (VecVT
727 getVCmpEQInst(MVT::SimpleValueType VecVT, bool HasVSX) argument
831 EVT VecVT = LHS.getValueType(); local
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypesGeneric.cpp | 372 EVT VecVT = N->getValueType(0); local
373 unsigned NumElts = VecVT.getVectorNumElements();
378 assert(OldVT == VecVT.getVectorElementType() &&
401 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
412 EVT VecVT = N->getValueType(0); local
413 unsigned NumElts = VecVT.getVectorNumElements();
420 assert(OldEVT == VecVT.getVectorElementType() &&
443 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
|
| H A D | LegalizeVectorTypes.cpp | 798 EVT VecVT = Vec.getValueType(); local
799 EVT SubVecVT = VecVT.getVectorElementType();
800 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
806 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
872 EVT VecVT = Vec.getValueType(); local
873 EVT EltVT = VecVT.getVectorElementType();
874 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
881 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
1334 EVT VecVT = Vec.getValueType(); local
1338 assert(IdxVal < VecVT
[all...] |
| H A D | LegalizeIntegerTypes.cpp | 947 EVT VecVT = N->getValueType(0); local
948 unsigned NumElts = VecVT.getVectorNumElements();
949 assert(!((NumElts & 1) && (!TLI.isTypeLegal(VecVT))) &&
|
| H A D | DAGCombiner.cpp | 10128 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), SourceType, NewBVElems);
10129 assert(VecVT.getSizeInBits() == VT.getSizeInBits() &&
10132 if (!isTypeLegal(VecVT)) return SDValue();
10135 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops);
|
| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 1150 EVT VecVT = EVT::getVectorVT(F->getContext(), EltVT, VecSize);
1190 Ofst += TD->getTypeAllocSize(VecVT.getTypeForEVT(F->getContext()));
1796 EVT VecVT = EVT::getVectorVT(F->getContext(), EltVT, 2); local
1798 VecVT.getTypeForEVT(F->getContext()), llvm::ADDRESS_SPACE_PARAM));
1802 VecVT, dl, Root, SrcAddr, MachinePointerInfo(SrcValue), false,
1804 TD->getABITypeAlignment(VecVT.getTypeForEVT(F->getContext())));
1820 Ofst += TD->getTypeAllocSize(VecVT.getTypeForEVT(F->getContext()));
1837 EVT VecVT = EVT::getVectorVT(F->getContext(), EltVT, VecSize); local
1840 PointerType::get(VecVT.getTypeForEVT(F->getContext()),
1846 VecVT, d
2004 EVT VecVT = local
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2975 EVT VecVT; local
2980 VecVT = MVT::v4i32;
2984 VecVal1 = DAG.getTargetInsertSubreg(AArch64::ssub, DL, VecVT,
2985 DAG.getUNDEF(VecVT), In1);
2986 VecVal2 = DAG.getTargetInsertSubreg(AArch64::ssub, DL, VecVT,
2987 DAG.getUNDEF(VecVT), In2);
2989 VecVal1 = DAG.getNode(ISD::BITCAST, DL, VecVT, In1);
2990 VecVal2 = DAG.getNode(ISD::BITCAST, DL, VecVT, In2);
2994 VecVT = MVT::v2i64;
3002 VecVal1 = DAG.getTargetInsertSubreg(AArch64::dsub, DL, VecVT,
5508 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), NewType, NumElts); local
[all...] |
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4688 MVT VecVT = N->getOperand(0).getSimpleValueType(); local
4689 MVT ElVT = VecVT.getVectorElementType();
4703 MVT VecVT = N->getSimpleValueType(0); local
4704 MVT ElVT = VecVT.getVectorElementType();
6577 EVT VecVT = MVT::v4i32; local
6583 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, Item);
6593 Item = DAG.getVectorShuffle(VecVT, dl, Item, DAG.getUNDEF(VecVT),
9768 MVT VecVT = Vec.getSimpleValueType();
9777 MVT ExtVT = (VecVT
[all...] |
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2775 EVT VecVT = N->getValueType(0); local
2776 EVT EltVT = VecVT.getVectorElementType();
2777 unsigned NumElts = VecVT.getVectorNumElements();
2780 return createDRegPairNode(VecVT, N->getOperand(0), N->getOperand(1));
2784 return createSRegPairNode(VecVT, N->getOperand(0), N->getOperand(1));
2786 return createQuadSRegsNode(VecVT, N->getOperand(0), N->getOperand(1),
|
| H A D | ARMISelLowering.cpp | 5044 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts); local
5045 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops);
5077 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); local
5081 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops);
5531 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); local
5532 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1);
5533 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2);
5544 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops);
8707 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts); local
8710 if (!TLI.isTypeLegal(VecVT))
[all...] |
| /external/llvm/lib/Target/R600/ |
| H A D | R600ISelLowering.cpp | 966 EVT VecVT = Vector.getValueType(); local
967 EVT EltVT = VecVT.getVectorElementType();
970 for (unsigned i = 0, e = VecVT.getVectorNumElements();
976 return DAG.getNode(AMDGPUISD::BUILD_VERTICAL_VECTOR, DL, VecVT, Args);
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