/external/chromium_org/media/base/ |
H A D | bit_reader_unittest.cc | 11 static void SetBit(uint8* buf, size_t size, size_t bit_pos) { argument 12 size_t byte_pos = bit_pos / 8; 13 bit_pos -= byte_pos * 8; 15 buf[byte_pos] |= (1 << (7 - bit_pos));
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/external/chromium_org/third_party/mesa/src/src/mesa/main/ |
H A D | texcompress_rgtc_tmp.h | 39 const char bit_pos = ((j&3) * 4 + (i&3)) * 3; local 40 const TYPE acodelow = blksrc[2 + bit_pos / 8]; 41 const TYPE acodehigh = (3 + bit_pos / 8) < 8 ? blksrc[3 + bit_pos / 8] : 0; 42 const TYPE code = (acodelow >> (bit_pos & 0x7) | 43 (acodehigh << (8 - (bit_pos & 0x7)))) & 0x7;
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/external/mesa3d/src/mesa/main/ |
H A D | texcompress_rgtc_tmp.h | 39 const char bit_pos = ((j&3) * 4 + (i&3)) * 3; local 40 const TYPE acodelow = blksrc[2 + bit_pos / 8]; 41 const TYPE acodehigh = (3 + bit_pos / 8) < 8 ? blksrc[3 + bit_pos / 8] : 0; 42 const TYPE code = (acodelow >> (bit_pos & 0x7) | 43 (acodehigh << (8 - (bit_pos & 0x7)))) & 0x7;
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/external/pdfium/core/src/fxcrt/ |
H A D | fx_basic_buffer.cpp | 421 FX_DWORD bit_pos = m_BitPos % 8, bit_left = nBits;
local 423 if (bit_pos) {
424 if (8 - bit_pos >= bit_left) {
425 result = (m_pData[byte_pos] & (0xff >> bit_pos)) >> (8 - bit_pos - bit_left);
429 bit_left -= 8 - bit_pos;
430 result = (m_pData[byte_pos++] & ((1 << (8 - bit_pos)) - 1)) << bit_left;
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/external/libhevc/decoder/ |
H A D | ihevcd_process_slice.c | 117 WORD32 bit_pos = proc_type; local 118 WORD32 bit_mask = (1 << bit_pos); 199 WORD32 bit_pos = proc_type; local 200 WORD32 bit_mask = (1 << bit_pos); 1040 * bit_pos has to be a WOR32 so that when it is negative, the downshift still retains it to be a negative value */ 1041 WORD32 bit_pos = ((ps_proc->i4_ctb_y << (log2_ctb_size - 3)) - 1) * loop_filter_strd + (ps_proc->i4_ctb_x << (log2_ctb_size - 3)) - 1; local 1046 ps_proc->s_deblk_ctxt.au2_ctb_no_loop_filter_flag[row] = (*(UWORD32 *)(ps_proc->pu1_pic_no_loop_filter_flag + (bit_pos >> 3))) >> (bit_pos & 7); 1047 bit_pos += loop_filter_strd;
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/external/vixl/src/a64/ |
H A D | assembler-a64.h | 715 void tbz(const Register& rt, unsigned bit_pos, Label* label); 718 void tbz(const Register& rt, unsigned bit_pos, int imm14); 721 void tbnz(const Register& rt, unsigned bit_pos, Label* label); 724 void tbnz(const Register& rt, unsigned bit_pos, int imm14); 1489 static Instr ImmTestBranchBit(unsigned bit_pos) { 1490 VIXL_ASSERT(is_uint6(bit_pos)); 1491 // Subtract five from the shift offset, as we need bit 5 from bit_pos. 1492 unsigned b5 = bit_pos << (ImmTestBranchBit5_offset - 5); 1493 unsigned b40 = bit_pos << ImmTestBranchBit40_offset;
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H A D | assembler-a64.cc | 504 unsigned bit_pos, 506 VIXL_ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSize))); 507 Emit(TBZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); 512 unsigned bit_pos, 514 tbz(rt, bit_pos, UpdateAndGetInstructionOffsetTo(label)); 519 unsigned bit_pos, 521 VIXL_ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSize))); 522 Emit(TBNZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); 527 unsigned bit_pos, 529 tbnz(rt, bit_pos, UpdateAndGetInstructionOffsetT 503 tbz(const Register& rt, unsigned bit_pos, int imm14) argument 511 tbz(const Register& rt, unsigned bit_pos, Label* label) argument 518 tbnz(const Register& rt, unsigned bit_pos, int imm14) argument 526 tbnz(const Register& rt, unsigned bit_pos, Label* label) argument [all...] |
H A D | macro-assembler-a64.h | 995 void Tbnz(const Register& rt, unsigned bit_pos, Label* label) { argument 998 tbnz(rt, bit_pos, label); 1000 void Tbz(const Register& rt, unsigned bit_pos, Label* label) { argument 1003 tbz(rt, bit_pos, label);
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H A D | simulator-a64.cc | 557 unsigned bit_pos = (instr->ImmTestBranchBit5() << 5) | 559 bool bit_zero = ((xreg(instr->Rt()) >> bit_pos) & 1) == 0;
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/external/pdfium/core/src/fxcodec/codec/ |
H A D | fx_codec_flate.cpp | 144 int bit_pos = m_InPos % 8, bit_left = m_CodeLen;
local 146 if (bit_pos) {
147 bit_left -= 8 - bit_pos;
148 code = (m_pInput[byte_pos++] & ((1 << (8 - bit_pos)) - 1)) << bit_left;
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/external/chromium_org/v8/src/arm64/ |
H A D | assembler-arm64-inl.h | 1041 Instr Assembler::ImmTestBranchBit(unsigned bit_pos) { argument 1042 DCHECK(is_uint6(bit_pos)); 1043 // Subtract five from the shift offset, as we need bit 5 from bit_pos. 1044 unsigned b5 = bit_pos << (ImmTestBranchBit5_offset - 5); 1045 unsigned b40 = bit_pos << ImmTestBranchBit40_offset;
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H A D | assembler-arm64.h | 1071 void tbz(const Register& rt, unsigned bit_pos, Label* label); 1072 void tbz(const Register& rt, unsigned bit_pos, int imm14); 1075 void tbnz(const Register& rt, unsigned bit_pos, Label* label); 1076 void tbnz(const Register& rt, unsigned bit_pos, int imm14); 1816 inline static Instr ImmTestBranchBit(unsigned bit_pos);
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H A D | assembler-arm64.cc | 1040 unsigned bit_pos, 1043 DCHECK(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSizeInBits))); 1044 Emit(TBZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); 1049 unsigned bit_pos, 1052 tbz(rt, bit_pos, LinkAndGetInstructionOffsetTo(label)); 1057 unsigned bit_pos, 1060 DCHECK(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSizeInBits))); 1061 Emit(TBNZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); 1066 unsigned bit_pos, 1069 tbnz(rt, bit_pos, LinkAndGetInstructionOffsetT 1039 tbz(const Register& rt, unsigned bit_pos, int imm14) argument 1048 tbz(const Register& rt, unsigned bit_pos, Label* label) argument 1056 tbnz(const Register& rt, unsigned bit_pos, int imm14) argument 1065 tbnz(const Register& rt, unsigned bit_pos, Label* label) argument [all...] |
H A D | macro-assembler-arm64.cc | 771 void MacroAssembler::Tbnz(const Register& rt, unsigned bit_pos, Label* label) { argument 779 tbz(rt, bit_pos, &done); 782 tbnz(rt, bit_pos, label); 788 void MacroAssembler::Tbz(const Register& rt, unsigned bit_pos, Label* label) { argument 796 tbnz(rt, bit_pos, &done); 799 tbz(rt, bit_pos, label);
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H A D | macro-assembler-arm64.h | 498 void Tbnz(const Register& rt, unsigned bit_pos, Label* label); 499 void Tbz(const Register& rt, unsigned bit_pos, Label* label);
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H A D | simulator-arm64.cc | 1334 unsigned bit_pos = (instr->ImmTestBranchBit5() << 5) | local 1336 bool take_branch = ((xreg(instr->Rt()) & (1UL << bit_pos)) == 0);
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/external/lldb/include/lldb/Core/ |
H A D | Scalar.h | 58 SignExtend (uint32_t bit_pos);
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/external/chromium_org/third_party/freetype/src/pshinter/ |
H A D | pshrec.c | 315 FT_UInt bit_pos, 335 FT_Byte* read = (FT_Byte*)source + ( bit_pos >> 3 ); 336 FT_Int rmask = 0x80 >> ( bit_pos & 7 ); 313 ps_mask_table_set_bits( PS_Mask_Table table, const FT_Byte* source, FT_UInt bit_pos, FT_UInt bit_count, FT_Memory memory ) argument
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/external/freetype/src/pshinter/ |
H A D | pshrec.c | 315 FT_UInt bit_pos, 335 FT_Byte* read = (FT_Byte*)source + ( bit_pos >> 3 ); 336 FT_Int rmask = 0x80 >> ( bit_pos & 7 ); 313 ps_mask_table_set_bits( PS_Mask_Table table, const FT_Byte* source, FT_UInt bit_pos, FT_UInt bit_count, FT_Memory memory ) argument
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/external/pdfium/core/src/fxge/fx_freetype/fxft2.5.01/src/pshinter/ |
H A D | pshrec.c | 315 FT_UInt bit_pos, 335 FT_Byte* read = (FT_Byte*)source + ( bit_pos >> 3 ); 336 FT_Int rmask = 0x80 >> ( bit_pos & 7 ); 313 ps_mask_table_set_bits( PS_Mask_Table table, const FT_Byte* source, FT_UInt bit_pos, FT_UInt bit_count, FT_Memory memory ) argument
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/external/valgrind/main/perf/ |
H A D | tinycc.c | 10430 int r, r2, rc2, bit_pos, bit_size, size, align, i; 10435 bit_pos = (vtop->type.t >> VT_STRUCT_SHIFT) & 0x3f; 10440 vpushi(32 - (bit_pos + bit_size)); 11883 int sbt, dbt, ft, r, t, size, align, bit_size, bit_pos, rc, delayed_cast; 11932 bit_pos = (ft >> VT_STRUCT_SHIFT) & 0x3f; 11944 vpushi(bit_pos); 11948 vpushi(~(((1 << bit_size) - 1) << bit_pos)); 12127 int bit_size, bit_pos, bsize, bt, lbit_pos; 12190 bit_pos = 0; 12241 bit_pos 10428 int r, r2, rc2, bit_pos, bit_size, size, align, i; local 11881 int sbt, dbt, ft, r, t, size, align, bit_size, bit_pos, rc, delayed_cast; local 12125 int bit_size, bit_pos, bsize, bt, lbit_pos; local 13967 int saved_global_expr, bt, bit_pos, bit_size; local [all...] |