| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
| H A D | ComplexToRealFixup.S | 90 #define dY0i v15.2s define
136 fsub dY0i,dX0r,dX0i // F(N/2) = ((Z0.r-Z0.i) , 0)
141 st1 {dY0i},[argDst], #8
226 fadd dY0i,dT1,dX0r
229 st2 {dY0r,dY0i},[argDst],step
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| H A D | armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S | 101 #define dY0i v5.2s define
239 fsub dY0i,dT1,dX0r
242 st2 {dY0r,dY0i},[pOut1],step
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| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| H A D | armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S | 117 #define dY0i D5.S32 define
263 VHSUB dY0i,dT1,dX0r
266 VSUB dY0i,dT1,dX0r
270 VST2 {dY0r,dY0i},[pOut1],step
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| H A D | omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 113 #define dY0i d15.f32 define
279 VSUB dY0i,dX0r,dX0i @// F(N/2) = ((Z0.r-Z0.i) , 0)
284 VST1 dY0i,[argDst]!
364 VADD dY0i,dT1,dX0r
367 VST2 {dY0r,dY0i},[argDst],step
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| H A D | armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S | 110 #define dY0i D5.F32 define
252 VSUB dY0i,dT1,dX0r
255 VST2 {dY0r,dY0i},[pOut1],step
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| H A D | omxSP_FFTFwd_RToCCS_S32_Sfs_s.S | 127 #define dY0i d15.s32 define
421 VSUB dY0i,dX0r,dX0i @// F(N/2) = ((Z0.r-Z0.i) , 0)
426 VST1 dY0i,[argDst]!
506 VADD dY0i,dT1,dX0r
509 VST2 {dY0r,dY0i},[argDst],step
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| H A D | armSP_FFTInv_CCSToR_S16_preTwiddleRadix2_unsafe_s.S | 102 #define dY0i D5.S16 define
234 VHSUB dY0i,dT1,dX0r
237 VSUB dY0i,dT1,dX0r
242 VST2 {dY0r,dY0i},[pOut1],step
360 VHSUB dY0i,dT1,dX0r
363 VSUB dY0i,dT1,dX0r
366 VST2 {dY0r[0],dY0i[0]},[pOut1]!
367 VST2 {dY0r[1],dY0i[1]},[pOut1],step
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| H A D | omxSP_FFTFwd_RToCCS_S16_Sfs_s.S | 120 #define dY0i d15.s16 define
435 VSUB dY0i,dX0r,dX0i @ F(N/2) = ((Z0.r-Z0.i) , 0)
503 VADD dY0i,dT1,dX0r
508 VST2 {dY0r,dY0i},[argDst],step
532 VSUB dY0i,dX0r,dX0i @ F(N/2) = ((Z0.r-Z0.i) , 0)
608 VADD dY0i,dT1,dX0r
610 VST2 {dY0r[0],dY0i[0]},[argDst]!
611 VST2 {dY0r[1],dY0i[1]},[argDst],step
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| H A D | omxSP_FFTInv_CCSToR_F32_Sfs_s.S | 119 #define dY0i D5.F32 define
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| H A D | omxSP_FFTInv_CCSToR_S32_Sfs_s.S | 136 #define dY0i D5.S32 define
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| H A D | omxSP_FFTInv_CCSToR_S16_Sfs_s.S | 111 #define dY0i D5.S32 define
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