Searched refs:drotr (Results 1 - 9 of 9) sorted by relevance
/external/llvm/test/MC/Mips/ |
H A D | mips_directives.s | 74 # CHECK: drotr $9, $6, 30 # encoding: [0x00,0x26,0x4f,0xba] 76 drotr $9, $6, 30
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H A D | mips64-alu-instructions.s | 76 # CHECK: drotr $9, $6, 20 # encoding: [0x3a,0x4d,0x26,0x00] 101 drotr $9, $6, 20
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/external/llvm/test/MC/Mips/mips64/ |
H A D | invalid-mips64r2.s | 9 drotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/chromium_org/v8/test/cctest/ |
H A D | test-disasm-mips64.cc | 501 COMPARE(drotr(a0, a1, 0), 502 "0025203a drotr a0, a1, 0"); 503 COMPARE(drotr(s0, s1, 8), 504 "0031823a drotr s0, s1, 8"); 505 COMPARE(drotr(a6, a7, 24), 506 "002b563a drotr a6, a7, 24"); 507 COMPARE(drotr(v0, v1, 31), 508 "002317fa drotr v0, v1, 31");
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/external/llvm/test/MC/Mips/mips5/ |
H A D | invalid-mips64r2.s | 14 drotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15 drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips64r2/ |
H A D | valid.s | 71 drotr $1,15 # CHECK: drotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfa] 72 drotr $1,$14,15 # CHECK: drotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfa]
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/external/chromium_org/v8/src/mips64/ |
H A D | assembler-mips64.h | 807 void drotr(Register rd, Register rt, uint16_t sa);
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H A D | assembler-mips64.cc | 1739 void Assembler::drotr(Register rd, Register rt, uint16_t sa) { function in class:v8::Assembler
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H A D | macro-assembler-mips64.cc | 1035 drotr(rd, rs, rt.imm64_);
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