/external/compiler-rt/lib/builtins/ppc/ |
H A D | restFP.S | 31 lfd f22,-80(r1)
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H A D | saveFP.S | 29 stfd f22,-80(r1)
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/external/llvm/test/MC/Mips/mips1/ |
H A D | valid.s | 27 c.sf.s $f14,$f22 30 cvt.d.s $f22,$f28 33 cvt.s.w $f22,$f15 101 sub.s $f23,$f22,$f22
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H A D | invalid-mips5-wrong-error.s | 9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
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H A D | invalid-mips2.s | 14 sqrt.d $f17,$f22 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 22 trunc.w.d $f22,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips2/ |
H A D | valid.s | 27 c.sf.s $f14,$f22 32 cvt.d.s $f22,$f28 35 cvt.s.w $f22,$f15 104 sqrt.d $f17,$f22 117 sub.s $f23,$f22,$f22 136 trunc.w.d $f22,$f15
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H A D | invalid-mips5-wrong-error.s | 9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
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/external/llvm/test/MC/Mips/mips32/ |
H A D | valid.s | 30 c.sf.s $f14,$f22 37 cvt.d.s $f22,$f28 40 cvt.s.w $f22,$f15 132 sqrt.d $f17,$f22 145 sub.s $f23,$f22,$f22 164 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips32r2/ |
H A D | valid.s | 30 c.sf.s $f14,$f22 37 cvt.d.s $f22,$f28 42 cvt.s.w $f22,$f15 160 sqrt.d $f17,$f22 173 sub.s $f23,$f22,$f22 194 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips3/ |
H A D | invalid-mips5-wrong-error.s | 9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
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H A D | valid.s | 28 c.sf.s $f14,$f22 36 cvt.d.s $f22,$f28 42 cvt.s.w $f22,$f15 162 sqrt.d $f17,$f22 175 sub.s $f23,$f22,$f22 195 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips4/ |
H A D | invalid-mips5-wrong-error.s | 9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
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H A D | valid.s | 30 c.sf.s $f14,$f22 38 cvt.d.s $f22,$f28 44 cvt.s.w $f22,$f15 180 sqrt.d $f17,$f22 193 sub.s $f23,$f22,$f22 214 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips64r6/ |
H A D | invalid-mips5-wrong-error.s | 8 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 33 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction 34 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
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/external/llvm/test/MC/ARM/ |
H A D | symbol-variants.s | 76 .word f22(TLSCALL) 78 @ CHECK: 58 R_ARM_TLS_CALL f22
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/external/llvm/test/MC/PowerPC/ |
H A D | ppc64-regs.s | 61 #CHECK: .cfi_offset f22, 476 62 #CHECK: .cfi_offset f22, 484 178 .cfi_offset f22,476 179 .cfi_offset f22,484
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/external/clang/test/CodeGenCXX/ |
H A D | aarch64-mangle-neon-vectors.cpp | 82 void f22(uint64x2_t) {} function
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/external/llvm/test/MC/Mips/mips5/ |
H A D | valid.s | 30 c.sf.s $f14,$f22 38 cvt.d.s $f22,$f28 44 cvt.s.w $f22,$f15 181 sqrt.d $f17,$f22 194 sub.s $f23,$f22,$f22 216 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips64/ |
H A D | valid.s | 30 c.sf.s $f14,$f22 40 cvt.d.s $f22,$f28 46 cvt.s.w $f22,$f15 197 sqrt.d $f17,$f22 210 sub.s $f23,$f22,$f22 233 trunc.w.d $f22,$f15
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/external/clang/test/CodeGen/ |
H A D | arm-arguments.c | 124 // APCS-GNU-LABEL: define i16 @f22() 130 // AAPCS-LABEL: define arm_aapcscc i16 @f22() 136 _Complex char f22(void) {} function
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/external/openssl/crypto/ |
H A D | alphacpuid.pl | 55 fclr $f22
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/external/chromium_org/v8/test/mjsunit/harmony/ |
H A D | block-let-crankshaft.js | 34 f15, f16, f17, f18, f19, f20, f21, f22, f23, f24, f25, f26, 147 function f22() { function
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/external/llvm/test/MC/Mips/mips32r6/ |
H A D | invalid-mips1.s | 12 c.sf.s $f14,$f22 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/valgrind/main/none/tests/mips32/ |
H A D | MoveIns.c | 305 TESTINSNMOVE("mfc1 $v1, $f22", 20, f22, v1); 334 TESTINSNMOVEt("mtc1 $v1, $f22", 22, f22, v1); 363 TESTINSNMOVE1s("mov.s $f21, $f22", 20, f21, f22); 364 TESTINSNMOVE1s("mov.s $f22, $f23", 24, f22, f23); 391 TESTINSNMOVE1d("mov.d $f20, $f22", 24, f20, f22); [all...] |
/external/llvm/test/MC/Mips/mips64r2/ |
H A D | valid.s | 30 c.sf.s $f14,$f22 40 cvt.d.s $f22,$f28 46 cvt.s.w $f22,$f15 224 sqrt.d $f17,$f22 237 sub.s $f23,$f22,$f22 260 trunc.w.d $f22,$f15
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