| /external/compiler-rt/lib/builtins/ppc/ |
| H A D | restFP.S | 38 lfd f29,-24(r1)
|
| H A D | saveFP.S | 36 stfd f29,-24(r1)
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| H A D | invalid-mips1.s | 9 c.ngl.d $f29,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips1/ |
| H A D | invalid-mips5-wrong-error.s | 24 c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| H A D | valid.s | 9 add.d $f1,$f7,$f29
24 c.ngl.d $f29,$f29
37 div.d $f29,$f20,$f27
|
| /external/llvm/test/MC/Mips/mips2/ |
| H A D | invalid-mips5-wrong-error.s | 24 c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| H A D | valid.s | 9 add.d $f1,$f7,$f29
24 c.ngl.d $f29,$f29
39 div.d $f29,$f20,$f27
|
| /external/llvm/test/MC/Mips/mips3/ |
| H A D | invalid-mips5-wrong-error.s | 24 c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| H A D | valid.s | 9 add.d $f1,$f7,$f29
25 c.ngl.d $f29,$f29
39 cvt.l.s $f11,$f29
56 div.d $f29,$f20,$f27
|
| H A D | invalid-mips4.s | 27 movz.d $f12,$f29,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips4/ |
| H A D | invalid-mips5-wrong-error.s | 24 c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| H A D | valid.s | 9 add.d $f1,$f7,$f29
27 c.ngl.d $f29,$f29
41 cvt.l.s $f11,$f29
58 div.d $f29,$f20,$f27
136 movz.d $f12,$f29,$9
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| H A D | invalid-mips5-wrong-error.s | 27 c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
39 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
45 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| H A D | invalid-mips1.s | 12 c.ngl.d $f29,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| H A D | valid.s | 9 add.d $f1,$f7,$f29
27 c.ngl.d $f29,$f29
40 cvt.l.s $f11,$f29
48 div.d $f29,$f20,$f27
102 movz.d $f12,$f29,$9
|
| /external/llvm/test/MC/Mips/mips32/ |
| H A D | valid.s | 9 add.d $f1,$f7,$f29
27 c.ngl.d $f29,$f29
45 div.d $f29,$f20,$f27
89 movz.d $f12,$f29,$9
|
| /external/llvm/test/MC/Mips/mips5/ |
| H A D | valid.s | 9 add.d $f1,$f7,$f29
27 c.ngl.d $f29,$f29
41 cvt.l.s $f11,$f29
58 div.d $f29,$f20,$f27
137 movz.d $f12,$f29,$9
|
| /external/llvm/test/MC/Mips/mips64/ |
| H A D | valid.s | 9 add.d $f1,$f7,$f29
27 c.ngl.d $f29,$f29
43 cvt.l.s $f11,$f29
63 div.d $f29,$f20,$f27
147 movz.d $f12,$f29,$9
|
| /external/clang/test/CodeGen/ |
| H A D | arm-arguments.c | 148 // APCS-GNU-LABEL: define i32 @f29()
149 // AAPCS-LABEL: define arm_aapcscc i32 @f29()
151 struct s29 f29() {} function
|
| /external/openssl/crypto/ |
| H A D | alphacpuid.pl | 62 fclr $f29
|
| /external/chromium_org/v8/test/mjsunit/harmony/ |
| H A D | block-let-crankshaft.js | 35 f27, f28, f29, f30, f31, f32, f33];
227 function f29() { function
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| H A D | valid.s | 9 add.d $f1,$f7,$f29
27 c.ngl.d $f29,$f29
43 cvt.l.s $f11,$f29
64 div.d $f29,$f20,$f27
163 movz.d $f12,$f29,$9
|
| /external/llvm/test/MC/ELF/ |
| H A D | cfi.s | 173 f29: label
|
| /external/llvm/test/MC/PowerPC/ |
| H A D | ppc64-regs.s | 69 #CHECK: .cfi_offset f29, 540
186 .cfi_offset f29,540
|
| /external/oprofile/module/ia64/ |
| H A D | IA64entry.h | 49 .spillsp f28, SW(F28)+16+(off); .spillsp f29, SW(F29)+16+(off); \
|