Searched refs:f64 (Results 1 - 25 of 127) sorted by relevance

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/external/clang/test/Sema/
H A Dvariadic-promotion.c5 void test_floating_promotion(__fp16 *f16, float f32, double f64) { argument
6 variadic(3, *f16, f32, f64);
/external/clang/test/CodeGen/
H A Dmms-bitfields.c5 long long f64; member in struct:s1
12 long long f64[4]; member in struct:s2
H A Dms_struct.c6 long long f64; member in struct:s1
13 long long f64[4]; member in struct:s2
/external/valgrind/main/VEX/useful/
H A Dfp_80_64.c44 static void convert_f80le_to_f64le_HW ( /*IN*/UChar* f80, /*OUT*/UChar* f64 )
48 : "r" (&f80[0]), "r" (&f64[0])
52 static void convert_f64le_to_f80le_HW ( /*IN*/UChar* f64, /*OUT*/UChar* f80 ) argument
56 : "r" (&f64[0]), "r" (&f80[0])
103 static void convert_f64le_to_f80le ( /*IN*/UChar* f64, /*OUT*/UChar* f80 ) argument
109 sign = toUChar( (f64[7] >> 7) & 1 );
110 bexp = (f64[7] << 4) | ((f64[6] >> 4) & 0x0F);
120 (f64[6] & 0x0F) == 0
121 && f64[
507 do_64_to_80_test( Int test_no, UChar* f64, UChar* f80h, UChar* f80s) argument
593 UChar* f64 = malloc(8); local
[all...]
/external/llvm/test/MC/ARM/
H A Dsingle-precision-fp.s5 vadd.f64 d0, d1, d2
6 vsub.f64 d2, d3, d4
7 vdiv.f64 d4, d5, d6
8 vmul.f64 d6, d7, d8
9 vnmul.f64 d8, d9, d10
11 @ CHECK-ERRORS-NEXT: vadd.f64 d0, d1, d2
13 @ CHECK-ERRORS-NEXT: vsub.f64 d2, d3, d4
15 @ CHECK-ERRORS-NEXT: vdiv.f64 d4, d5, d6
17 @ CHECK-ERRORS-NEXT: vmul.f64 d6, d7, d8
19 @ CHECK-ERRORS-NEXT: vnmul.f64 d
[all...]
H A Dfp-armv8.s5 vcvtt.f64.f16 d3, s1
6 @ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
7 vcvtt.f16.f64 s5, d12
8 @ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0xee]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xee]
15 vcvttge.f64.f16 d3, s1
16 @ CHECK: vcvttge.f64
[all...]
H A Dthumb-fp-armv8.s5 vcvtt.f64.f16 d3, s1
6 @ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
7 vcvtt.f16.f64 s5, d12
8 @ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
16 vcvttge.f64.f16 d3, s1
17 @ CHECK: vcvttge.f64
[all...]
H A Dinvalid-fp-armv8.s5 vcvtt.f64.f16 d3, s1
6 @ V7-NOT: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
7 vcvtt.f16.f64 s5, d12
8 @ V7-NOT: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
39 vselgt.f64 s3, s2, s1
43 vselgt.f64 q0, s3, q1
48 vminnm.f64 s3, s2, s1
52 vmaxnm.f64 q0, s3, q1
54 vmaxnmgt.f64 q0, s3, q1
57 vcvta.s32.f64 d
[all...]
H A Ddirective-arch_extension-fp.s35 vselgt.f64 d0, d0, d0
37 vselge.f64 d0, d0, d0
39 vseleq.f64 d0, d0, d0
41 vselvs.f64 d0, d0, d0
43 vmaxnm.f64 d0, d0, d0
45 vminnm.f64 d0, d0, d0
48 vcvtb.f64.f16 d0, s0
50 vcvtb.f16.f64 s0, d0
52 vcvtt.f64.f16 d0, s0
54 vcvtt.f16.f64 s
[all...]
/external/valgrind/main/VEX/priv/
H A Dguest_generic_x87.c105 void convert_f64le_to_f80le ( /*IN*/UChar* f64, /*OUT*/UChar* f80 ) argument
111 sign = toUChar( (f64[7] >> 7) & 1 );
112 bexp = (f64[7] << 4) | ((f64[6] >> 4) & 0x0F);
122 (f64[6] & 0x0F) == 0
123 && f64[5] == 0 && f64[4] == 0 && f64[3] == 0
124 && f64[2] == 0 && f64[
[all...]
/external/valgrind/main/none/tests/amd64/
H A Dnan80and64.c61 static void rev64 ( UChar* f64 )
63 SWAPC( f64[0], f64[7] );
64 SWAPC( f64[1], f64[6] );
65 SWAPC( f64[2], f64[5] );
66 SWAPC( f64[3], f64[4] );
H A Dbug132918.c13 double f64; local
28 : /*in*/ "m" (f64), "m" (xx), "m" (yy)
31 res->d = f64;
/external/compiler-rt/lib/builtins/arm/
H A Dadddf3vfp.S23 vadd.f64 d6, d6, d7
H A Ddivdf3vfp.S23 vdiv.f64 d5, d6, d7
H A Deqdf2vfp.S24 vcmp.f64 d6, d7
H A Dextendsfdf2vfp.S23 vcvt.f64.f32 d7, s15 // convert single to double
H A Dfixdfsivfp.S23 vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15
H A Dfixunsdfsivfp.S24 vcvt.u32.f64 s15, d7 // convert double to 32-bit int into s15
H A Dfloatsidfvfp.S23 vcvt.f64.s32 d7, s15 // convert 32-bit int in s15 to double in d7
H A Dfloatunssidfvfp.S23 vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
H A Dgedf2vfp.S24 vcmp.f64 d6, d7
H A Dgtdf2vfp.S24 vcmp.f64 d6, d7
H A Dledf2vfp.S24 vcmp.f64 d6, d7
H A Dltdf2vfp.S24 vcmp.f64 d6, d7
H A Dmuldf3vfp.S23 vmul.f64 d6, d6, d7

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