Searched refs:fcvtzu (Results 1 - 19 of 19) sorted by relevance

/external/llvm/test/MC/AArch64/
H A Dneon-scalar-cvt.s59 fcvtzu s21, s12, #1
60 fcvtzu d21, d12, #1
62 // CHECK: fcvtzu s21, s12, #1 // encoding: [0x95,0xfd,0x3f,0x7f]
63 // CHECK: fcvtzu d21, d12, #1 // encoding: [0x95,0xfd,0x7f,0x7f]
177 fcvtzu s12, s13
178 fcvtzu d21, d14
180 // CHECK: fcvtzu s12, s13 // encoding: [0xac,0xb9,0xa1,0x7e]
181 // CHECK: fcvtzu d21, d14 // encoding: [0xd5,0xb9,0xe1,0x7e]
H A Darm64-fp-encoding.s258 fcvtzu w1, s2
259 fcvtzu w1, s2, #1
260 fcvtzu w1, d2
261 fcvtzu w1, d2, #1
262 fcvtzu x1, s2
263 fcvtzu x1, s2, #1
264 fcvtzu x1, d2
265 fcvtzu x1, d2, #1
267 ; CHECK: fcvtzu w1, s2 ; encoding: [0x41,0x00,0x39,0x1e]
268 ; CHECK: fcvtzu w
[all...]
H A Dneon-simd-shift.s423 fcvtzu v0.2s, v1.2s, #3
424 fcvtzu v0.4s, v1.4s, #3
425 fcvtzu v0.2d, v1.2d, #3
431 // CHECK: fcvtzu v0.2s, v1.2s, #3 // encoding: [0x20,0xfc,0x3d,0x2f]
432 // CHECK: fcvtzu v0.4s, v1.4s, #3 // encoding: [0x20,0xfc,0x3d,0x6f]
433 // CHECK: fcvtzu v0.2d, v1.2d, #3 // encoding: [0x20,0xfc,0x7d,0x6f]
H A Dneon-simd-misc.s570 fcvtzu v6.4s, v8.4s
571 fcvtzu v6.2d, v8.2d
572 fcvtzu v4.2s, v0.2s
574 // CHECK: fcvtzu v6.4s, v8.4s // encoding: [0x06,0xb9,0xa1,0x6e]
575 // CHECK: fcvtzu v6.2d, v8.2d // encoding: [0x06,0xb9,0xe1,0x6e]
576 // CHECK: fcvtzu v4.2s, v0.2s // encoding: [0x04,0xb8,0xa1,0x2e]
H A Dbasic-a64-instructions.s1956 fcvtzu w3, s5, #1
1957 fcvtzu wzr, s20, #13
1958 fcvtzu w19, s0, #32
1959 // CHECK: fcvtzu w3, s5, #1 // encoding: [0xa3,0xfc,0x19,0x1e]
1960 // CHECK: fcvtzu wzr, s20, #13 // encoding: [0x9f,0xce,0x19,0x1e]
1961 // CHECK: fcvtzu w19, s0, #32 // encoding: [0x13,0x80,0x19,0x1e]
1963 fcvtzu x3, s5, #1
1964 fcvtzu x12, s30, #45
1965 fcvtzu x19, s0, #64
1966 // CHECK: fcvtzu x
[all...]
H A Dbasic-a64-diagnostics.s1678 fcvtzu w13, s31, #0
1679 fcvtzu w19, s20, #33
1680 fcvtzu wsp, s19, #14
1682 // CHECK-ERROR-NEXT: fcvtzu w13, s31, #0
1685 // CHECK-ERROR-NEXT: fcvtzu w19, s20, #33
1688 // CHECK-ERROR-NEXT: fcvtzu wsp, s19, #14
1691 fcvtzu x13, s31, #0
1692 fcvtzu x19, s20, #65
1693 fcvtzu sp, s19, #14
1695 // CHECK-ERROR-NEXT: fcvtzu x1
[all...]
H A Darm64-advsimd.s761 fcvtzu.2s v0, v0
762 fcvtzu.4s v0, v0
763 fcvtzu.2d v0, v0
764 fcvtzu s0, s0
765 fcvtzu d0, d0
767 ; CHECK: fcvtzu.2s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x2e]
768 ; CHECK: fcvtzu.4s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x6e]
769 ; CHECK: fcvtzu.2d v0, v0 ; encoding: [0x00,0xb8,0xe1,0x6e]
770 ; CHECK: fcvtzu s0, s0 ; encoding: [0x00,0xb8,0xa1,0x7e]
771 ; CHECK: fcvtzu d
[all...]
H A Dneon-diagnostics.s2071 fcvtzu v0.2s, v1.2s, #33
2072 fcvtzu v0.4s, v1.4s, #33
2073 fcvtzu v0.2d, v1.2d, #65
2085 // CHECK-ERROR: fcvtzu v0.2s, v1.2s, #33
2088 // CHECK-ERROR: fcvtzu v0.4s, v1.4s, #33
2091 // CHECK-ERROR: fcvtzu v0.2d, v1.2d, #65
5926 fcvtzu v0.16b, v31.16b
5927 fcvtzu v2.8h, v4.8h
5928 fcvtzu v1.8b, v9.8b
5929 fcvtzu v1
[all...]
/external/chromium_org/v8/test/cctest/
H A Dtest-disasm-arm64.cc1528 COMPARE(fcvtzu(x16, d17), "fcvtzu x16, d17");
1529 COMPARE(fcvtzu(w18, d19), "fcvtzu w18, d19");
1532 COMPARE(fcvtzu(x16, s17), "fcvtzu x16, s17");
1533 COMPARE(fcvtzu(w18, s19), "fcvtzu w18, s19");
H A Dtest-assembler-arm64.cc7545 TEST(fcvtzu) {
/external/vixl/test/
H A Dtest-disasm-a64.cc1481 COMPARE(fcvtzu(x16, d17), "fcvtzu x16, d17");
1482 COMPARE(fcvtzu(w18, d19), "fcvtzu w18, d19");
1485 COMPARE(fcvtzu(x16, s17), "fcvtzu x16, s17");
1486 COMPARE(fcvtzu(w18, s19), "fcvtzu w18, s19");
H A Dtest-simulator-a64.cc1008 DEFINE_TEST_FP_TO_INT(fcvtzu, FPToU, Conversions)
H A Dtest-assembler-a64.cc6741 TEST(fcvtzu) {
/external/chromium_org/v8/src/arm64/
H A Dassembler-arm64.h1709 void fcvtzu(const Register& rd, const FPRegister& fn);
H A Dmacro-assembler-arm64-inl.h651 fcvtzu(rd, fn);
H A Dassembler-arm64.cc2034 void Assembler::fcvtzu(const Register& rd, const FPRegister& fn) { function in class:v8::internal::Assembler
/external/vixl/src/a64/
H A Dassembler-a64.h1365 void fcvtzu(const Register& rd, const FPRegister& fn);
H A Dmacro-assembler-a64.h601 fcvtzu(rd, fn);
H A Dassembler-a64.cc1476 void Assembler::fcvtzu(const Register& rd, const FPRegister& fn) { function in class:vixl::Assembler

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