Searched refs:i16 (Results 1 - 25 of 166) sorted by relevance

1234567

/external/valgrind/main/drd/tests/
H A Dannotate_trace_memory.c8 volatile int16_t i16; variable
17 DRD_TRACE_VAR(i16);
31 i16 = 7;
32 i16++;
43 DRD_STOP_TRACING_VAR(i16);
/external/clang/test/CXX/dcl.decl/dcl.init/dcl.init.list/
H A Dp7-0x-fixits.cpp14 struct {int16_t i;} i16 = {70000}; local
/external/llvm/test/MC/ARM/
H A Dvmov-vmvn-illegal-cases.s9 @ CHECK: vmov.i16 q2, #0xffab
11 @ CHECK: vmov.i16 q2, #0xffab
18 @ CHECK: vmvn.i16 q2, #0xffab
20 @ CHECK: vmvn.i16 q2, #0xffab
24 vmov.i16 q2, #0xffab
25 vmov.i16 q2, #0xffab
29 vmvn.i16 q2, #0xffab
30 vmvn.i16 q2, #0xffab
H A Dvorr-vbic-illegal-cases.s13 @ CHECK: vorr.i16 q2, #0xabab
15 @ CHECK: vorr.i16 q2, #0xabab
26 @ CHECK: vbic.i16 d2, #0xabab
28 @ CHECK: vbic.i16 q2, #0xabab
34 vorr.i16 q2, #0xabab
35 vorr.i16 q2, #0xabab
41 vbic.i16 d2, #0xabab
42 vbic.i16 q2, #0xabab
H A Dneon-mul-encoding.s4 vmul.i16 d16, d16, d17
8 vmul.i16 q8, q8, q9
13 vmul.i16 d18, d8, d0[3]
16 vmul.i16 d16, d17
20 vmul.i16 q8, q9
27 @ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xf2]
31 @ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xf2]
36 @ CHECK: vmul.i16 d18, d8, d0[3] @ encoding: [0x68,0x28,0xd8,0xf2]
39 @ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xf2]
43 @ CHECK: vmul.i16 q
[all...]
H A Dneon-bitcount-encoding.s9 @ CHECK: vclz.i16 d16, d16 @ encoding: [0xa0,0x04,0xf4,0xf3]
10 vclz.i16 d16, d16
15 @ CHECK: vclz.i16 q8, q8 @ encoding: [0xe0,0x04,0xf4,0xf3]
16 vclz.i16 q8, q8
H A Dneont2-bitcount-encoding.s12 vclz.i16 d16, d16
15 vclz.i16 q8, q8
19 @ CHECK: vclz.i16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x04]
22 @ CHECK: vclz.i16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x04]
H A Dvmov-vmvn-byte-replicate.s23 vmov.i16 q2, #0xabab
24 vmov.i16 q2, #0xabab
30 vmvn.i16 d2, #0xabab
31 vmvn.i16 q2, #0xabab
H A Dneon-mul-accum-encoding.s4 vmla.i16 d16, d18, d17
8 vmla.i16 q9, q8, q10
14 @ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xf2]
18 @ CHECK: vmla.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xf2]
55 vmls.i16 d16, d18, d17
59 vmls.i16 q9, q8, q10
62 vmls.i16 q4, q12, d6[2]
65 @ CHECK: vmls.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xf3]
69 @ CHECK: vmls.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xf3]
72 @ CHECK: vmls.i16 q
[all...]
H A Dneont2-mov-encoding.s6 vmov.i16 d16, #0x10
7 vmov.i16 d16, #0x1000
17 @ CHECK: vmov.i16 d16, #0x10 @ encoding: [0xc1,0xef,0x10,0x08]
18 @ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0xc1,0xef,0x10,0x0a]
29 vmov.i16 q8, #0x10
30 vmov.i16 q8, #0x1000
40 @ CHECK: vmov.i16 q8, #0x10 @ encoding: [0xc1,0xef,0x50,0x08]
41 @ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0xc1,0xef,0x50,0x0a]
51 vmvn.i16 d16, #0x10
52 vmvn.i16 d1
[all...]
/external/clang/test/SemaCXX/
H A Dms_integer_suffix.cpp8 static_assert(sizeof(0i16) == __SIZEOF_INT16__, "");
/external/libpng/contrib/tools/
H A DmakesRGB.c77 unsigned int i, i16, ibase; local
152 for (i16=0; i16 <= 65535; ++i16)
154 unsigned int i = 255*i16;
224 for (i16=ibase; i16 < ibase+128; ++i16)
226 unsigned int i = 255*i16;
337 for (i16
[all...]
/external/chromium_org/v8/test/mjsunit/compiler/
H A Dregress-177883.js68 var i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i12 = 0, i13 = 0, i14 = 0, i15 = 0, i16 = 0, d17 = 0.0, d18 = 0.0, i19 = 0, i20 = 0, i21 = 0, i22 = 0;
88 i16 = 0;
90 if ((i16 | 0) == 1) {
97 } else if ((i16 | 0) == 4) {
102 } else if ((i16 | 0) == 6) {
109 } else if ((i16 | 0) == 5) {
116 } else if ((i16 | 0) == 3) {
123 } else if ((i16 | 0) == 0) {
128 } else if ((i16 | 0) == 2) {
135 } else if ((i16 |
[all...]
/external/clang/test/SemaTemplate/
H A Dinstantiate-attr.cpp8 typedef T __attribute__((aligned(16))) i16; typedef in struct:A::B
9 i16 x;
/external/chromium_org/third_party/opus/src/silk/
H A Dresampler_structs.h42 opus_int16 i16[ SILK_RESAMPLER_MAX_FIR_ORDER ]; member in union:_silk_resampler_state_struct::__anon14724
H A Dresampler_private_IIR_FIR.c81 silk_memcpy( buf, S->sFIR.i16, RESAMPLER_ORDER_FIR_12 * sizeof( opus_int16 ) );
105 silk_memcpy( S->sFIR.i16, &buf[ nSamplesIn << 1 ], RESAMPLER_ORDER_FIR_12 * sizeof( opus_int16 ) );
/external/libopus/silk/
H A Dresampler_structs.h42 opus_int16 i16[ SILK_RESAMPLER_MAX_FIR_ORDER ]; member in union:_silk_resampler_state_struct::__anon24555
/external/chromium_org/third_party/libyuv/unit_test/
H A Dbasictypes_test.cc29 int16 i16 = -1; local
37 EXPECT_EQ(2u, sizeof(i16));
45 EXPECT_GT(0, i16);
/external/libhevc/common/arm/
H A Dihevc_deblk_chroma_horz.s92 vsub.i16 q3,q0,q1
96 vshl.i16 q3,q3,#2
106 vadd.i16 q2,q3,q2
108 vsub.i16 q3,q2,q8
135 vadd.i16 q1,q1,q2
136 vsub.i16 q0,q0,q2
H A Dihevc_intra_pred_chroma_planar.s202 vadd.i16 q6, q6, q8 @add (nt)
206 vadd.i16 q14,q14,q8
219 vmovn.i16 d12, q6
221 vmovn.i16 d13,q14
226 vadd.i16 q13, q13, q8 @add (nt)
232 vadd.i16 q12,q12,q8
245 vadd.i16 q11, q11, q8 @add (nt)
248 vmovn.i16 d26, q13
250 vmovn.i16 d27,q12
256 vadd.i16 q1
[all...]
H A Dihevc_inter_pred_luma_copy_w16out.s157 vshl.i16 q0,q8,#6 @vshlq_n_s16(tmp, 6)
158 vshl.i16 q1,q9,#6 @vshlq_n_s16(tmp, 6)
159 vshl.i16 q2,q10,#6 @vshlq_n_s16(tmp, 6)
160 vshl.i16 q3,q11,#6 @vshlq_n_s16(tmp, 6)
198 vshl.i16 q0,q8,#6 @vshlq_n_s16(tmp, 6)
201 vshl.i16 q1,q9,#6 @vshlq_n_s16(tmp, 6)
204 vshl.i16 q2,q10,#6 @vshlq_n_s16(tmp, 6)
209 vshl.i16 q3,q11,#6 @vshlq_n_s16(tmp, 6)
232 vshl.i16 q0,q8,#6 @vshlq_n_s16(tmp, 6)
233 vshl.i16 q
[all...]
/external/chromium_org/third_party/webrtc/base/
H A Dbasictypes_unittest.cc30 int16 i16 = -1; local
38 EXPECT_EQ(2u, sizeof(i16));
46 EXPECT_GT(0, i16);
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp269 MVT::i16, AM.Disp,
272 Disp = CurDAG->getTargetConstantPool(AM.CP, MVT::i16,
275 Disp = CurDAG->getTargetExternalSymbol(AM.ES, MVT::i16, 0/*AM.SymbolFlags*/);
277 Disp = CurDAG->getTargetJumpTable(AM.JT, MVT::i16, 0/*AM.SymbolFlags*/);
282 Disp = CurDAG->getTargetConstant(AM.Disp, MVT::i16);
318 case MVT::i16:
343 case MVT::i16:
351 VT, MVT::i16, MVT::Other,
366 unsigned Opc = (VT == MVT::i16 ? Opc16 : Opc8);
371 CurDAG->SelectNodeTo(Op, Opc, VT, MVT::i16, MV
[all...]
H A DMSP430ISelLowering.cpp65 addRegisterClass(MVT::i16, &MSP430::GR16RegClass);
81 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal);
87 setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
90 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
95 setOperationAction(ISD::SRA, MVT::i16, Custom);
96 setOperationAction(ISD::SHL, MVT::i16, Custom);
97 setOperationAction(ISD::SRL, MVT::i16, Custom);
100 setOperationAction(ISD::ROTL, MVT::i16, Expand);
101 setOperationAction(ISD::ROTR, MVT::i16, Expand);
102 setOperationAction(ISD::GlobalAddress, MVT::i16, Custo
[all...]
/external/clang/test/Lexer/
H A Dms-extensions.c6 __int16 x2 = 4i16;

Completed in 555 milliseconds

1234567