Searched refs:imm (Results 1 - 25 of 288) sorted by relevance

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/external/chromium_org/chrome/browser/chromeos/input_method/
H A Daccessibility.cc16 Accessibility::Accessibility(InputMethodManager* imm) argument
17 : imm_(imm) {
27 void Accessibility::InputMethodChanged(InputMethodManager* imm, argument
29 DCHECK_EQ(imm, imm_);
H A Daccessibility.h17 explicit Accessibility(InputMethodManager* imm);
22 virtual void InputMethodChanged(InputMethodManager* imm,
H A Dmode_indicator_browsertest.cc121 InputMethodManager* imm = InputMethodManager::Get(); local
122 ASSERT_TRUE(imm);
129 imm->GetActiveIMEState()->EnableLoginLayouts("fr", keyboard_layouts);
130 ASSERT_LT(1UL, imm->GetActiveIMEState()->GetNumActiveInputMethods());
142 EXPECT_TRUE(imm->GetActiveIMEState()->SwitchToNextInputMethod());
157 EXPECT_TRUE(imm->GetActiveIMEState()->SwitchToNextInputMethod());
179 EXPECT_TRUE(imm->GetActiveIMEState()->SwitchToNextInputMethod());
189 InputMethodManager* imm = InputMethodManager::Get(); local
190 ASSERT_TRUE(imm);
197 imm
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/external/chromium_org/chrome/browser/chromeos/login/ui/
H A Duser_adding_screen_input_methods_controller.cc24 input_method::InputMethodManager* imm = local
26 saved_ime_state_ = imm->GetActiveIMEState();
27 imm->SetState(saved_ime_state_->Clone());
28 imm->GetActiveIMEState()->EnableLockScreenLayouts();
/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/
H A Dimm64.asm7 mov rax, 0x1000 ; 32-bit imm
8 mov rax, 0x1122334455667788 ; 64-bit imm (larger than signed 32-bit)
9 ;mov rax, 0x80000000 ; 64-bit imm (larger than signed 32-bit)
10 mov rax, label1 ; 32-bit imm <--- not 64-bit!
11 mov rax, label2 ; 32-bit imm <--- not 64-bit!
12 mov rax, qword 0x1000 ; 64-bit imm
13 mov rax, qword label1 ; 64-bit imm
14 mov rax, qword label2 ; 64-bit imm
16 mov qword [rax], 0x1000 ; 32-bit imm
17 mov qword [rax], 0x1122334455667788 ; 32-bit imm, overflo
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H A Driprel1.asm5 mov rax, val ; 32-bit imm
6 mov rax, dword val ; 32-bit imm
7 mov rax, qword val ; 64-bit imm
9 mov rbx, val ; 32-bit imm
10 mov rbx, dword val ; 32-bit imm
11 mov rbx, qword val ; 64-bit imm
37 mov rax, val ; 32-bit imm
38 mov rax, dword val ; 32-bit imm
39 mov rax, qword val ; 64-bit imm
41 mov rbx, val ; 32-bit imm
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/external/clang/lib/Headers/
H A Drtmintrin.h52 #define _xabort(imm) __builtin_ia32_xabort((imm))
H A Df16cintrin.h38 #define _mm_cvtps_ph(a, imm) __extension__ ({ \
40 (__m128i)__builtin_ia32_vcvtps2ph((__v4sf)__a, (imm)); })
42 #define _mm256_cvtps_ph(a, imm) __extension__ ({ \
44 (__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)__a, (imm)); })
/external/valgrind/main/none/tests/mips64/
H A Dlogical_instructions.stdout.exp513 andi $t0, $t1, 0xff :: rt 0x0, rs 0x0, imm 0x00ff
514 andi $t2, $t3, 0xffff :: rt 0x0, rs 0x0, imm 0xffff
515 andi $a0, $a1, 0x0 :: rt 0x0, rs 0x0, imm 0x0000
516 andi $s0, $s1, 0x23 :: rt 0x0, rs 0x0, imm 0x0023
517 andi $t0, $t1, 0xff :: rt 0xaa, rs 0x12bd6aa, imm 0x00ff
518 andi $t2, $t3, 0xffff :: rt 0xd6aa, rs 0x12bd6aa, imm 0xffff
519 andi $a0, $a1, 0x0 :: rt 0x0, rs 0x12bd6aa, imm 0x0000
520 andi $s0, $s1, 0x23 :: rt 0x22, rs 0x12bd6aa, imm 0x0023
521 andi $t0, $t1, 0xff :: rt 0x0, rs 0x0, imm 0x00ff
522 andi $t2, $t3, 0xffff :: rt 0x0, rs 0x0, imm
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H A Dmacro_int.h19 #define TEST2(instruction, RSval, imm, RT, RS) \
31 printf("%s :: rt 0x%llx, rs 0x%llx, imm 0x%04x\n", \
32 instruction, out, (long long) RSval, imm); \
91 #define TEST6(instruction, imm, RT) \
101 printf("%s :: rt 0x%llx, imm 0x%04x\n", \
102 instruction, out, imm); \
/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/lc3b/
H A Dlc3bbc.c74 yasm_value_delete(&insn->imm);
85 if (!insn->imm.abs)
90 yasm_value_print(&insn->imm, f, indent_level);
146 if (insn->imm.rel
147 && (!yasm_symrec_get_label(insn->imm.rel, &target_prevbc)
154 add_span(add_span_data, bc, 1, &insn->imm, -512+(long)bc->len,
185 insn->imm.size = 4;
186 if (output_value(&insn->imm, *bufp, 2, buf_off, bc, 1, d))
190 insn->imm.size = 5;
191 insn->imm
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/external/llvm/lib/Target/Sparc/
H A DSparc.h119 inline static unsigned HI22(int64_t imm) { argument
120 return (unsigned)((imm >> 10) & ((1 << 22)-1));
123 inline static unsigned LO10(int64_t imm) { argument
124 return (unsigned)(imm & 0x3FF);
127 inline static unsigned HIX22(int64_t imm) { argument
128 return HI22(~imm);
131 inline static unsigned LOX10(int64_t imm) { argument
132 return ~LO10(~imm);
H A DSparcJITInfo.cpp102 #define SETHI_INST(imm, rd) (0x01000000 | ((rd) << 25) | ((imm) & 0x3FFFFF))
103 #define JMP_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x38 << 19) \
104 | ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF))
106 #define OR_INST_I(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x02 << 19) \
107 | ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF))
112 #define LDX_INST(rs1, imm, rd) (0xC0000000 | ((rd) << 25) | (0x0B << 19) \
113 | ((rs1) << 14) | (1 << 13) | ((imm) & 0x1FFF))
114 #define SLLX_INST(rs1, imm, rd) (0x80000000 | ((rd) << 25) | (0x25 << 19) \
115 | ((rs1) << 14) | (3 << 12) | ((imm)
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/external/pcre/dist/sljit/
H A DsljitNativePPC_32.c29 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si reg, sljit_sw imm) argument
31 if (imm <= SIMM_MAX && imm >= SIMM_MIN)
32 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm));
34 if (!(imm & ~0xffff))
35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm));
37 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16)));
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS;
101 return push_inst(compiler, ADDI | D(dst) | A(src1) | compiler->imm);
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H A DsljitNativePPC_64.c44 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si reg, sljit_sw imm) argument
51 if (imm <= SIMM_MAX && imm >= SIMM_MIN)
52 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm));
54 if (!(imm & ~0xffff))
55 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm));
57 if (imm <= 0x7fffffffl && imm >= -0x80000000l) {
58 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16)));
59 return (imm
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H A DsljitNativeARM_T2_32.c57 #define IMM3(imm) (imm << 6)
58 #define IMM8(imm) (imm)
76 #define IMM5(imm) \
77 (COPY_BITS(imm, 2, 12, 3) | ((imm & 0x3) << 6))
78 #define IMM12(imm) \
79 (COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm,
206 emit_imm32_const(struct sljit_compiler *compiler, sljit_si dst, sljit_uw imm) argument
428 get_imm(sljit_uw imm) argument
477 load_immediate(struct sljit_compiler *compiler, sljit_si dst, sljit_uw imm) argument
517 sljit_uw imm, nimm; local
1551 sljit_uw imm; local
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/
H A Dlp_bld_bitarit.h66 lp_build_shl_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm);
69 lp_build_shr_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm);
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/
H A Dtgsi_transform.h55 struct tgsi_full_immediate *imm);
77 const struct tgsi_full_immediate *imm);
H A Dtgsi_dump.h58 const struct tgsi_full_immediate *imm );
/external/chromium_org/v8/src/arm64/
H A Ddelayed-masm-arm64-inl.h38 void DelayedMasm::Fmov(FPRegister fd, double imm) { argument
40 __ Fmov(fd, imm);
/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_bitarit.h66 lp_build_shl_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm);
69 lp_build_shr_imm(struct lp_build_context *bld, LLVMValueRef a, unsigned imm);
/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_transform.h55 struct tgsi_full_immediate *imm);
77 const struct tgsi_full_immediate *imm);
H A Dtgsi_dump.h58 const struct tgsi_full_immediate *imm );
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/
H A Du_simple_shaders.c142 struct ureg_src imm = ureg_imm4f( ureg, 0, 0, 0, 1 ); local
144 ureg_MOV( ureg, out, imm );
185 struct ureg_src imm; local
205 imm = ureg_imm4f( ureg, 0, 0, 0, 1 );
207 ureg_MOV( ureg, out, imm );
231 struct ureg_src imm; local
256 imm = ureg_imm4f( ureg, 0, 0, 0, 1 );
258 ureg_MOV( ureg, out, imm );
285 struct ureg_src imm; local
305 imm
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/external/mesa3d/src/gallium/auxiliary/util/
H A Du_simple_shaders.c142 struct ureg_src imm = ureg_imm4f( ureg, 0, 0, 0, 1 ); local
144 ureg_MOV( ureg, out, imm );
185 struct ureg_src imm; local
205 imm = ureg_imm4f( ureg, 0, 0, 0, 1 );
207 ureg_MOV( ureg, out, imm );
231 struct ureg_src imm; local
256 imm = ureg_imm4f( ureg, 0, 0, 0, 1 );
258 ureg_MOV( ureg, out, imm );
285 struct ureg_src imm; local
305 imm
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