| /external/llvm/test/MC/Mips/ |
| H A D | micromips-loadstore-instructions.s | 15 # CHECK-EL: lhu $4, 8($2) # encoding: [0x82,0x34,0x08,0x00]
29 # CHECK-EB: lhu $4, 8($2) # encoding: [0x34,0x82,0x00,0x08]
40 lhu $4, 8($2)
|
| H A D | mips-memory-instructions.s | 30 # CHECK: lhu $4, 4($5) # encoding: [0x04,0x00,0xa4,0x94]
40 lhu $4, 4($5)
|
| H A D | nacl-mask.s | 47 lhu $1, 0($4)
76 # CHECK-NEXT: lhu $1, 0($4)
|
| /external/pixman/pixman/ |
| H A D | pixman-mips-dspr2-asm.S | 198 lhu t0, 0(a1)
199 lhu t1, 2(a1)
214 lhu t0, 0(a1)
375 lhu t7, 1(a1) /* t7 = 0 | 0 | B1 | G1 */
412 lhu t7, 0(a1) /* t7 = 0 | 0 | G1 | R1 */
570 lhu t5, 1(a1) /* t5 = 0 | 0 | B1 | G1 */
606 lhu t5, 0(a1) /* t5 = 0 | 0 | G1 | R1 */
1112 lhu t2, 0(a0) /* t2 = dst */
1113 lhu t3, 2(a0) /* t3 = dst */
1134 lhu t
[all...] |
| /external/llvm/test/MC/Mips/mips1/ |
| H A D | valid.s | 44 lhu $s3,-22851($v0)
|
| /external/chromium_org/v8/src/mips/ |
| H A D | regexp-macro-assembler-mips.cc | 375 __ lhu(a3, MemOperand(a0, 0));
377 __ lhu(t0, MemOperand(a2, 0));
1315 __ lhu(current_character(), MemOperand(t5, 0));
|
| H A D | assembler-mips.h | 798 void lhu(Register rd, const MemOperand& rs);
|
| H A D | codegen-mips.cc | 1070 __ lhu(result, MemOperand(at));
|
| H A D | lithium-codegen-mips.cc | 1857 __ lhu(result, operand);
3179 __ lhu(result, mem_operand);
|
| H A D | assembler-mips.cc | 1696 void Assembler::lhu(Register rd, const MemOperand& rs) { function in class:v8::Assembler
1701 GenInstrImmediate(LHU, at, rd, 0); // Equiv to lhu(rd, MemOperand(at, 0));
|
| /external/chromium_org/v8/src/mips64/ |
| H A D | regexp-macro-assembler-mips64.cc | 411 __ lhu(a3, MemOperand(a0, 0));
413 __ lhu(a4, MemOperand(a2, 0));
1361 __ lhu(current_character(), MemOperand(t1, 0));
|
| H A D | disasm-mips64.cc | 1328 Format(instr, "lhu 'rt, 'imm16s('rs)");
|
| H A D | assembler-mips64.h | 821 void lhu(Register rd, const MemOperand& rs);
|
| H A D | codegen-mips64.cc | 959 __ lhu(result, MemOperand(at));
|
| H A D | assembler-mips64.cc | 1823 void Assembler::lhu(Register rd, const MemOperand& rs) { function in class:v8::Assembler
1828 GenInstrImmediate(LHU, at, rd, 0); // Equiv to lhu(rd, MemOperand(at, 0));
|
| /external/llvm/test/MC/Mips/mips2/ |
| H A D | valid.s | 51 lhu $s3,-22851($v0)
|
| /external/llvm/test/MC/Mips/mips32/ |
| H A D | valid.s | 57 lhu $s3,-22851($v0)
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| H A D | valid.s | 65 lhu $s3,-22851($v0)
|
| /external/chromium_org/v8/test/cctest/ |
| H A D | test-assembler-mips64.cc | 513 // lhu with negative data.
514 __ lhu(a7, MemOperand(a0, OFFSET_OF(T, si)) );
525 __ lhu(t1, MemOperand(a0, OFFSET_OF(T, si)) );
1342 // lhu with negative data.
1343 __ lhu(a7, MemOperand(a0, OFFSET_OF(T, si)));
1354 __ lhu(t1, MemOperand(a0, OFFSET_OF(T, si)));
|
| H A D | test-assembler-mips.cc | 498 // lhu with negative data.
499 __ lhu(t3, MemOperand(a0, OFFSET_OF(T, si)) );
510 __ lhu(t5, MemOperand(a0, OFFSET_OF(T, si)) );
|
| /external/llvm/test/MC/Mips/mips3/ |
| H A D | valid.s | 101 lhu $s3,-22851($v0)
|
| /external/llvm/test/MC/Mips/mips4/ |
| H A D | valid.s | 104 lhu $s3,-22851($v0)
|
| /external/llvm/test/MC/Mips/mips5/ |
| H A D | valid.s | 104 lhu $s3,-22851($v0)
|
| /external/llvm/test/MC/Mips/mips64/ |
| H A D | valid.s | 109 lhu $s3,-22851($v0)
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| H A D | valid.s | 123 lhu $s3,-22851($v0)
|