Searched refs:madd (Results 1 - 25 of 47) sorted by relevance

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/external/eigen/Eigen/src/Core/products/
H A DGeneralBlockPanelKernel.h206 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, AccPacket& c, AccPacket& tmp) const function in class:Eigen::internal::gebp_traits
277 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, AccPacket& c, RhsPacket& tmp) const function in class:Eigen::internal::gebp_traits
379 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, DoublePacket& c, RhsPacket& /*tmp*/) const function in class:Eigen::internal::gebp_traits
385 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, ResPacket& c, RhsPacket& /*tmp*/) const function in class:Eigen::internal::gebp_traits
482 EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, AccPacket& c, RhsPacket& tmp) const function in class:Eigen::internal::gebp_traits
606 traits.madd(A0,B_0,C0,T0);
607 traits.madd(A1,B_0,C4,B_0);
609 traits.madd(A0,B_0,C1,T0);
610 traits.madd(A1,B_0,C5,B_0);
615 traits.madd(A
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/external/llvm/test/MC/Mips/
H A Dmicromips-multiply-instructions.s12 # CHECK-EL: madd $4, $5 # encoding: [0xa4,0x00,0x3c,0xcb]
19 # CHECK-EB: madd $4, $5 # encoding: [0x00,0xa4,0xcb,0x3c]
23 madd $4, $5
H A Dmips-dsp-instructions.s31 # CHECK: madd $ac1, $6, $7 # encoding: [0x70,0xc7,0x08,0x00]
42 # CHECK: madd $6, $7 # encoding: [0x70,0xc7,0x00,0x00]
79 madd $ac1, $6, $7
90 madd $6, $7
H A Dmicromips-fpu-instructions.s64 # CHECK-EL: madd.s $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x01,0x11]
65 # CHECK-EL: madd.d $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x09,0x11]
127 # CHECK-EB: madd.s $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x01]
128 # CHECK-EB: madd.d $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x09]
186 madd.s $f2, $f4, $f6, $f8
187 madd.d $f2, $f4, $f6, $f8
H A Dmips-alu-instructions.s82 # CHECK: madd $6, $7 # encoding: [0x00,0x00,0xc7,0x70]
107 madd $6,$7
H A Dmips64-alu-instructions.s78 # CHECK: madd $6, $7 # encoding: [0x00,0x00,0xc7,0x70]
103 madd $6,$7
/external/llvm/test/MC/Mips/mips32r6/
H A Dinvalid-mips32r2.s8 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips32.s8 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/valgrind/main/none/tests/mips64/
H A Dfpu_arithmetic.stdout.exp1931 madd.s -347857.000000 -347856.500000 0.000000 -4578.500000
1932 madd.s 564212.000000 356047.500000 456.250000 456.250000
1933 madd.s 101.000000 -1.000000 3.000000 34.031250
1934 madd.s -4556.000000 23.062500 -1.000000 4578.750000
1935 madd.s 244040.000000 1752.000000 1384.500000 175.000000
1936 madd.s -776.000000 0.015625 -7.250000 107.000000
1937 madd.s -456249999360.000000 0.031250 1000000000.000000 -456.250000
1938 madd.s -206611.000000 -248562.750000 -5786.500000 -7.250000
1939 madd.s -6092948.000000 1384.500000 1752.000000 -3478.500000
1940 madd
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/external/clang/test/SemaCXX/
H A Dvector-casts.cpp43 void madd(const testvec& rhs) { function in struct:testvec
/external/llvm/test/MC/Mips/mips5/
H A Dinvalid-mips64.s16 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips64r2.s22 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
23 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips4/
H A Dinvalid-mips64r2.s18 madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
20 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips64.s15 madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips5-wrong-error.s31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
/external/llvm/test/MC/Mips/mips32/
H A Dinvalid-mips32r2.s15 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips2/
H A Dinvalid-mips32r2.s21 madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
22 madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
23 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips32.s17 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips5-wrong-error.s31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
/external/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s76 madd $s6,$13
77 madd $zero,$9
78 madd.d $f18,$f19,$f26,$f20
79 madd.s $f1,$f31,$f19,$f25
/external/llvm/test/MC/Mips/mips64/
H A Dinvalid-mips64r2.s17 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/mips1/
H A Dinvalid-mips5-wrong-error.s31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
/external/llvm/test/MC/Mips/mips3/
H A Dinvalid-mips5-wrong-error.s31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
/external/llvm/test/MC/Mips/mips64r6/
H A Dinvalid-mips5-wrong-error.s33 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
/external/libhevc/common/arm64/
H A Dihevc_weighted_pred_bi.s190 madd x4,x12,x8,x4 //(lvl_shift1 * wgt0) + (lvl_shift2 * wgt1)

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