/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_lowering_nv50.cpp | 407 bld.mkOp1(OP_ABS, ty, a, div->getSrc(0)); 408 bld.mkOp1(OP_ABS, ty, b, div->getSrc(1)); 449 bld.mkOp1(OP_NEG, ty, s, q)->setPredicate(CC_S, cond); 450 bld.mkOp1(OP_MOV, ty, t, q)->setPredicate(CC_NS, cond); 647 Instruction *cond = bld.mkOp1(OP_UNION, TYPE_U32, bld.getScratch(), 790 bld.mkOp1(OP_ABS, TYPE_S32, i->getDef(0), i->getDef(0)); 922 bld.mkOp1(OP_LOAD, TYPE_U16, x, 954 Instruction *rcp = bld.mkOp1(OP_RCP, i->dType, bld.getSSA(), i->getSrc(1)); 963 Instruction *rsq = bld.mkOp1(OP_RSQ, TYPE_F32, 976 bld.mkOp1(OP_LG [all...] |
H A D | nv50_ir_from_tgsi.cpp | 1379 mkOp1(OP_SAT, dstTy, val, val); 1595 mkOp1(OP_RCP, TYPE_F32, val, val); 1803 mkOp1(op, dstTy, dst0[c], fetchSrc(0, c)); 1808 mkOp1(OP_ABS, TYPE_F32, val0, src0); 1809 mkOp1(OP_RSQ, TYPE_F32, val0, val0); 1826 val0 = mkOp1(op, TYPE_F32, getScratch(), fetchSrc(0, 0))->getDef(0); 1828 mkOp1(OP_MOV, TYPE_F32, dst0[c], val0); 1834 mkOp1(OP_PRESIN, TYPE_F32, val0, fetchSrc(0, 0)); 1835 mkOp1(op, TYPE_F32, val0, val0); 1841 mkOp1(OP_PRESI [all...] |
H A D | nv50_ir_build_util.cpp | 66 BuildUtil::mkOp1(operation op, DataType ty, Value *dst, Value *src) function in class:nv50_ir::BuildUtil 142 Instruction *insn = mkOp1(OP_VFETCH, ty, dst, sym); 165 Instruction *insn = mkOp1(op, ty, dst, sym); 300 insn = mkOp1(OP_SPLIT, fTy, h[0], val);
|
H A D | nv50_ir_from_sm4.cpp | 1205 mkOp1(OP_SAT, dTy, value, value); 1275 ld = mkOp1(OP_VFETCH, TYPE_U32, res, iSym(idx, swz)); 1509 mkOp1(OP_RCP, TYPE_F32, dst0[c], dst0[c]); 1611 mkOp1(OP_RCP, TYPE_F32, val, val); 1850 mkOp1(op, dTy, dst0[c], src(0, c)); 1858 mkOp1(OP_FLOOR, TYPE_F32, val, src0); 1874 Instruction *rnd = mkOp1(op, dTy, dst0[c], src(0, c)); 1882 mkOp1(op, dTy, dst0[c], src(0, c)); 1891 mkOp1(OP_SIN, TYPE_F32, dst0[c], val); 1893 mkOp1(OP_CO [all...] |
H A D | nv50_ir_build_util.h | 53 Instruction *mkOp1(operation, DataType, Value *, Value *); 265 mkOp1(op, ty, dst, src);
|
H A D | nv50_ir_peephole.cpp | 747 bld.mkOp1(OP_NEG, TYPE_S32, i->getDef(0), tB);
|
/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_lowering_nv50.cpp | 407 bld.mkOp1(OP_ABS, ty, a, div->getSrc(0)); 408 bld.mkOp1(OP_ABS, ty, b, div->getSrc(1)); 449 bld.mkOp1(OP_NEG, ty, s, q)->setPredicate(CC_S, cond); 450 bld.mkOp1(OP_MOV, ty, t, q)->setPredicate(CC_NS, cond); 647 Instruction *cond = bld.mkOp1(OP_UNION, TYPE_U32, bld.getScratch(), 790 bld.mkOp1(OP_ABS, TYPE_S32, i->getDef(0), i->getDef(0)); 922 bld.mkOp1(OP_LOAD, TYPE_U16, x, 954 Instruction *rcp = bld.mkOp1(OP_RCP, i->dType, bld.getSSA(), i->getSrc(1)); 963 Instruction *rsq = bld.mkOp1(OP_RSQ, TYPE_F32, 976 bld.mkOp1(OP_LG [all...] |
H A D | nv50_ir_from_tgsi.cpp | 1379 mkOp1(OP_SAT, dstTy, val, val); 1595 mkOp1(OP_RCP, TYPE_F32, val, val); 1803 mkOp1(op, dstTy, dst0[c], fetchSrc(0, c)); 1808 mkOp1(OP_ABS, TYPE_F32, val0, src0); 1809 mkOp1(OP_RSQ, TYPE_F32, val0, val0); 1826 val0 = mkOp1(op, TYPE_F32, getScratch(), fetchSrc(0, 0))->getDef(0); 1828 mkOp1(OP_MOV, TYPE_F32, dst0[c], val0); 1834 mkOp1(OP_PRESIN, TYPE_F32, val0, fetchSrc(0, 0)); 1835 mkOp1(op, TYPE_F32, val0, val0); 1841 mkOp1(OP_PRESI [all...] |
H A D | nv50_ir_build_util.cpp | 66 BuildUtil::mkOp1(operation op, DataType ty, Value *dst, Value *src) function in class:nv50_ir::BuildUtil 142 Instruction *insn = mkOp1(OP_VFETCH, ty, dst, sym); 165 Instruction *insn = mkOp1(op, ty, dst, sym); 300 insn = mkOp1(OP_SPLIT, fTy, h[0], val);
|
H A D | nv50_ir_from_sm4.cpp | 1205 mkOp1(OP_SAT, dTy, value, value); 1275 ld = mkOp1(OP_VFETCH, TYPE_U32, res, iSym(idx, swz)); 1509 mkOp1(OP_RCP, TYPE_F32, dst0[c], dst0[c]); 1611 mkOp1(OP_RCP, TYPE_F32, val, val); 1850 mkOp1(op, dTy, dst0[c], src(0, c)); 1858 mkOp1(OP_FLOOR, TYPE_F32, val, src0); 1874 Instruction *rnd = mkOp1(op, dTy, dst0[c], src(0, c)); 1882 mkOp1(op, dTy, dst0[c], src(0, c)); 1891 mkOp1(OP_SIN, TYPE_F32, dst0[c], val); 1893 mkOp1(OP_CO [all...] |
H A D | nv50_ir_build_util.h | 53 Instruction *mkOp1(operation, DataType, Value *, Value *); 265 mkOp1(op, ty, dst, src);
|
H A D | nv50_ir_peephole.cpp | 747 bld.mkOp1(OP_NEG, TYPE_S32, i->getDef(0), tB);
|
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
H A D | nv50_ir_lowering_nvc0.cpp | 866 bld.mkOp1(OP_RDSV, TYPE_U32, laneid, bld.mkSysVal(SV_LANEID, 0)); 939 Instruction *rcp = bld.mkOp1(OP_RCP, i->dType, bld.getSSA(), i->getSrc(1)); 951 bld.mkOp1(OP_RCP, TYPE_F32, value, i->getSrc(1)); 953 bld.mkOp1(OP_TRUNC, TYPE_F32, value, value); 963 Instruction *rsq = bld.mkOp1(OP_RSQ, TYPE_F32, 976 bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0)); 978 bld.mkOp1(OP_PREEX2, TYPE_F32, val, val); 1071 bld.mkOp1(OP_PREEX2, TYPE_F32, i->getDef(0), i->getSrc(0));
|
/external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
H A D | nv50_ir_lowering_nvc0.cpp | 866 bld.mkOp1(OP_RDSV, TYPE_U32, laneid, bld.mkSysVal(SV_LANEID, 0)); 939 Instruction *rcp = bld.mkOp1(OP_RCP, i->dType, bld.getSSA(), i->getSrc(1)); 951 bld.mkOp1(OP_RCP, TYPE_F32, value, i->getSrc(1)); 953 bld.mkOp1(OP_TRUNC, TYPE_F32, value, value); 963 Instruction *rsq = bld.mkOp1(OP_RSQ, TYPE_F32, 976 bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0)); 978 bld.mkOp1(OP_PREEX2, TYPE_F32, val, val); 1071 bld.mkOp1(OP_PREEX2, TYPE_F32, i->getDef(0), i->getSrc(0));
|