Searched refs:multu (Results 1 - 25 of 31) sorted by relevance

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/external/openssl/crypto/bn/asm/
H A Dmips-mont.S51 multu $12,$13
56 multu $10,$8
59 multu $16,$13
63 multu $14,$23
66 multu $18,$23
83 multu $12,$13
95 multu $14,$23
134 multu $12,$13
140 multu $10,$8
145 multu
[all...]
H A Dbn-mips.S30 multu $12,$7
44 multu $14,$7
57 multu $8,$7
71 multu $10,$7
96 multu $12,$7
111 multu $12,$7
126 multu $12,$7
165 multu $12,$7
173 multu $14,$7
184 multu
[all...]
/external/llvm/test/MC/Mips/mips32r6/
H A Dinvalid-mips1.s21 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
22 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips2.s17 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/
H A Dmips-dsp-instructions.s30 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x85,0x10,0x19]
41 # CHECK: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
78 multu $ac2, $4, $5
89 multu $4, $5
H A Dmicromips-alu-instructions.s38 # CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
72 # CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
104 multu $9, $7
H A Dmips-alu-instructions.s87 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
112 multu $3,$5
H A Dmips64-alu-instructions.s83 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
108 multu $3,$5
/external/llvm/test/MC/Mips/mips64r6/
H A Dinvalid-mips1.s24 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
25 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips2.s20 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
21 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips3.s22 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
23 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
H A Dinvalid-mips64.s43 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/chromium_org/v8/test/cctest/
H A Dtest-disasm-mips.cc121 COMPARE(multu(a0, a1),
122 "00850019 multu a0, a1");
123 COMPARE(multu(t2, t3),
124 "014b0019 multu t2, t3");
125 COMPARE(multu(v0, v1),
126 "00430019 multu v0, v1");
H A Dtest-disasm-mips64.cc139 COMPARE(multu(a0, a1),
140 "00850019 multu a0, a1");
143 COMPARE(multu(a6, a7),
144 "014b0019 multu a6, a7");
147 COMPARE(multu(v0, v1),
148 "00430019 multu v0, v1");
/external/llvm/test/MC/Mips/mips1/
H A Dvalid.s69 multu $gp,$k0
70 multu $9,$s2
/external/llvm/test/MC/Mips/mips2/
H A Dvalid.s77 multu $gp,$k0
78 multu $9,$s2
/external/llvm/test/MC/Mips/mips32/
H A Dvalid.s103 multu $gp,$k0
104 multu $9,$s2
/external/llvm/test/MC/Mips/mips32r2/
H A Dvalid.s119 multu $gp,$k0
120 multu $9,$s2
/external/pixman/pixman/
H A Dpixman-mips-dspr2-asm.h663 multu $ac0, \wt1, \scratch1
673 multu $ac1, \wt1, \scratch1
685 multu $ac2, \wt1, \scratch1
697 multu $ac3, \wt1, \scratch1
/external/llvm/test/MC/Mips/mips3/
H A Dvalid.s130 multu $gp,$k0
131 multu $9,$s2
/external/llvm/test/MC/Mips/mips4/
H A Dvalid.s146 multu $gp,$k0
147 multu $9,$s2
/external/llvm/test/MC/Mips/mips5/
H A Dvalid.s147 multu $gp,$k0
148 multu $9,$s2
/external/llvm/test/MC/Mips/mips64/
H A Dvalid.s161 multu $gp,$k0
162 multu $9,$s2
/external/llvm/test/MC/Mips/mips64r2/
H A Dvalid.s179 multu $gp,$k0
180 multu $9,$s2
/external/chromium_org/v8/src/mips64/
H A Ddisasm-mips64.cc797 Format(instr, "multu 'rs, 'rt");

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