Searched refs:opc (Results 1 - 25 of 75) sorted by relevance

123

/external/valgrind/main/auxprogs/
H A Ds390-check-opcodes.pl8 # It utilizes <binutils>/opcodes/s390-opc.txt and
10 # - identify new opcodes that are present in s390-opc.txt
11 # (s390-opc.txt is the golden list)
18 die "usage: s390-check-opcodes s390-opcodes.csv s390-opc.txt guest_s390_toIR.c\n";
33 # Read s390-opc.txt (binutils)
202 foreach my $opc (keys %opc_desc) {
203 if (! $csv_desc{$opc}) {
204 print "*** opcode $opc not listed in $csv_file\n";
207 foreach my $opc (keys %csv_desc) {
208 if (! $opc_desc{$opc}) {
[all...]
/external/wpa_supplicant_8/hostapd/src/crypto/
H A Dmilenage.c27 * @opc: OPc = 128-bit value derived from OP and K
36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, argument
44 tmp1[i] = _rand[i] ^ opc[i];
57 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i];
67 tmp1[i] ^= opc[i];
78 * @opc: OPc = 128-bit value derived from OP and K
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, argument
96 tmp1[i] = _rand[i] ^ opc[i];
108 tmp1[i] = tmp2[i] ^ opc[i];
114 tmp3[i] ^= opc[
173 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) argument
208 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) argument
235 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) argument
270 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) argument
[all...]
H A Dmilenage.h12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
17 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
19 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
22 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand,
24 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand,
/external/wpa_supplicant_8/src/crypto/
H A Dmilenage.c27 * @opc: OPc = 128-bit value derived from OP and K
36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, argument
44 tmp1[i] = _rand[i] ^ opc[i];
57 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i];
67 tmp1[i] ^= opc[i];
78 * @opc: OPc = 128-bit value derived from OP and K
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, argument
96 tmp1[i] = _rand[i] ^ opc[i];
108 tmp1[i] = tmp2[i] ^ opc[i];
114 tmp3[i] ^= opc[
173 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) argument
208 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) argument
235 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) argument
270 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) argument
[all...]
H A Dmilenage.h12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
17 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
19 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
22 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand,
24 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand,
/external/wpa_supplicant_8/wpa_supplicant/src/crypto/
H A Dmilenage.c27 * @opc: OPc = 128-bit value derived from OP and K
36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, argument
44 tmp1[i] = _rand[i] ^ opc[i];
57 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i];
67 tmp1[i] ^= opc[i];
78 * @opc: OPc = 128-bit value derived from OP and K
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, argument
96 tmp1[i] = _rand[i] ^ opc[i];
108 tmp1[i] = tmp2[i] ^ opc[i];
114 tmp3[i] ^= opc[
173 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) argument
208 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) argument
235 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) argument
270 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) argument
[all...]
H A Dmilenage.h12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
17 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
19 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
22 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand,
24 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand,
/external/libunwind/src/ia64/
H A DGscript.c267 enum ia64_script_insn_opcode opc; local
275 opc = IA64_INSN_MOVE;
286 opc = IA64_INSN_MOVE_STACKED_NAT;
288 opc = IA64_INSN_MOVE_STACKED;
296 opc = IA64_INSN_MOVE_NAT;
302 opc = IA64_INSN_MOVE_SCRATCH_NAT;
304 opc = IA64_INSN_MOVE_SCRATCH;
323 opc = IA64_INSN_MOVE_SCRATCH;
333 opc = IA64_INSN_MOVE_NO_NAT;
337 opc
521 unsigned long opc, dst; local
[all...]
/external/clang/lib/StaticAnalyzer/Checkers/
H A DMallocOverflowSecurityChecker.cpp74 BinaryOperatorKind opc = binop->getOpcode(); local
76 if (mulop == nullptr && opc == BO_Mul)
78 if (opc != BO_Mul && opc != BO_Add && opc != BO_Sub && opc != BO_Shl)
85 else if ((opc == BO_Add || opc == BO_Mul)
/external/qemu/tcg/i386/
H A Dtcg-target.c373 static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) argument
377 if (opc & P_GS) {
380 if (opc & P_DATA16) {
382 assert((opc & P_REXW) == 0);
385 if (opc & P_ADDR32) {
390 rex |= (opc & P_REXW) >> 8; /* REX.W */
400 rex |= opc & (r >= 4 ? P_REXB_R : 0);
401 rex |= opc & (rm >= 4 ? P_REXB_RM : 0);
407 if (opc & P_EXT) {
410 tcg_out8(s, opc);
413 tcg_out_opc(TCGContext *s, int opc) argument
429 tcg_out_modrm(TCGContext *s, int opc, int r, int rm) argument
440 tcg_out_modrm_sib_offset(TCGContext *s, int opc, int r, int rm, int index, int shift, intptr_t offset) argument
523 tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, intptr_t offset) argument
543 int opc = OPC_MOVL_GvEv + (type == TCG_TYPE_I64 ? P_REXW : 0); local
607 int opc = OPC_MOVL_GvEv + (type == TCG_TYPE_I64 ? P_REXW : 0); local
614 int opc = OPC_MOVL_EvGv + (type == TCG_TYPE_I64 ? P_REXW : 0); local
621 int opc = OPC_MOVL_EvIz + (type == TCG_TYPE_I64 ? P_REXW : 0); local
761 tcg_out_jxx(TCGContext *s, int opc, int label_index, int small) argument
1152 add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOp opc, TCGReg datalo, TCGReg datahi, TCGReg addrlo, TCGReg addrhi, int mem_index, uint8_t *raddr, uint8_t **label_ptr) argument
1179 TCGMemOp opc = l->opc; local
1262 TCGMemOp opc = l->opc; local
1429 TCGMemOp opc; local
1551 TCGMemOp opc; local
1603 tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) argument
[all...]
/external/libunwind/include/tdep-ia64/
H A Dscript.h36 unsigned int opc; /* see enum ia64_script_insn_opcode */ member in struct:ia64_script_insn
/external/qemu/tcg/
H A Dtcg-op.h28 static inline void tcg_gen_op0(TCGOpcode opc) argument
30 *tcg_ctx.gen_opc_ptr++ = opc;
33 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 arg1) argument
35 *tcg_ctx.gen_opc_ptr++ = opc;
39 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 arg1) argument
41 *tcg_ctx.gen_opc_ptr++ = opc;
45 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg arg1) argument
47 *tcg_ctx.gen_opc_ptr++ = opc;
51 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2) argument
53 *tcg_ctx.gen_opc_ptr++ = opc;
58 tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2) argument
65 tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGArg arg2) argument
72 tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGArg arg2) argument
79 tcg_gen_op2ii(TCGOpcode opc, TCGArg arg1, TCGArg arg2) argument
86 tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3) argument
95 tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3) argument
104 tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGArg arg3) argument
113 tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGArg arg3) argument
122 tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, TCGv_ptr base, TCGArg offset) argument
131 tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val, TCGv_ptr base, TCGArg offset) argument
140 tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4) argument
150 tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4) argument
160 tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGArg arg4) argument
170 tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGArg arg4) argument
180 tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGArg arg3, TCGArg arg4) argument
190 tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGArg arg3, TCGArg arg4) argument
200 tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5) argument
211 tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5) argument
222 tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5) argument
233 tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5) argument
244 tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGArg arg4, TCGArg arg5) argument
256 tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGArg arg4, TCGArg arg5) argument
268 tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5, TCGv_i32 arg6) argument
281 tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5, TCGv_i64 arg6) argument
294 tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5, TCGArg arg6) argument
307 tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5, TCGArg arg6) argument
320 tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5, TCGArg arg6) argument
333 tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5, TCGArg arg6) argument
[all...]
H A Dtcg-be-ldst.h28 TCGMemOp opc:4; member in struct:TCGLabelQemuLdst
/external/openssl/crypto/bio/
H A Dbss_log.c357 opcdef_p->opc$b_ms_type = OPC$_RQ_RQST;
358 memcpy(opcdef_p->opc$z_ms_target_classes, &VMS_OPC_target, 3);
359 opcdef_p->opc$l_ms_rqstid = 0;
360 memcpy(&opcdef_p->opc$l_ms_text, buf, len);
/external/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp602 unsigned opc = getNewValueJumpOpcode(cmpInstr, cmpOp2, local
606 opc = QII->getInvertedPredicatedOpcode(opc);
610 QII->get(opc))
621 QII->get(opc))
627 QII->get(opc))
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/
H A Dnv50_ir_emit_nvc0.cpp294 CodeEmitterNVC0::emitForm_A(const Instruction *i, uint64_t opc) argument
296 code[0] = opc;
297 code[1] = opc >> 32;
334 CodeEmitterNVC0::emitForm_B(const Instruction *i, uint64_t opc) argument
336 code[0] = opc;
337 code[1] = opc >> 32;
363 CodeEmitterNVC0::emitForm_S(const Instruction *i, uint32_t opc, bool pred) argument
365 code[0] = opc;
368 if (opc == 0x0d || opc
1397 uint32_t opc; local
1424 uint32_t opc; local
1498 uint64_t opc; local
[all...]
/external/mesa3d/src/gallium/drivers/nvc0/codegen/
H A Dnv50_ir_emit_nvc0.cpp294 CodeEmitterNVC0::emitForm_A(const Instruction *i, uint64_t opc) argument
296 code[0] = opc;
297 code[1] = opc >> 32;
334 CodeEmitterNVC0::emitForm_B(const Instruction *i, uint64_t opc) argument
336 code[0] = opc;
337 code[1] = opc >> 32;
363 CodeEmitterNVC0::emitForm_S(const Instruction *i, uint32_t opc, bool pred) argument
365 code[0] = opc;
368 if (opc == 0x0d || opc
1397 uint32_t opc; local
1424 uint32_t opc; local
1498 uint64_t opc; local
[all...]
/external/wpa_supplicant_8/hostapd/
H A Dhlr_auc_gw.c86 u8 opc[16]; member in struct:milenage_parameters
125 " opc CHAR(32) NOT NULL,"
176 if (os_strcmp(col[i], "opc") == 0 && argv[i] &&
177 hexstr2bin(argv[i], m->opc, sizeof(m->opc))) {
209 "SELECT ki,opc,amf,sqn FROM milenage WHERE imsi=%llu;",
487 if (strlen(pos) != 32 || hexstr2bin(pos, m->opc, 16)) {
577 pos += wpa_snprintf_hex(pos, end - pos, m->opc, 16);
657 gsm_milenage(m->opc, m->ki, _rand, sres, kc);
724 gsm_milenage(m->opc,
[all...]
/external/qemu/target-mips/
H A Dtranslate.c987 static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, argument
1004 switch (opc) {
1144 static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt, argument
1165 switch (opc) {
1185 static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft, argument
1201 switch (opc) {
1257 static void gen_arith_imm (CPUMIPSState *env, DisasContext *ctx, uint32_t opc, argument
1263 if (rt == 0 && opc != OPC_ADDI && opc != OPC_DADDI) {
1269 switch (opc) {
1344 gen_logic_imm(CPUMIPSState *env, uint32_t opc, int rt, int rs, int16_t imm) argument
1386 gen_slt_imm(CPUMIPSState *env, uint32_t opc, int rt, int rs, int16_t imm) argument
1414 gen_shift_imm(CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int rt, int rs, int16_t imm) argument
1553 gen_arith(CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument
1734 gen_cond_move(CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt) argument
1771 gen_logic(CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt) argument
1831 gen_slt(CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt) argument
1862 gen_shift(CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument
1973 gen_HILO(DisasContext *ctx, uint32_t opc, int reg) argument
2009 gen_muldiv(DisasContext *ctx, uint32_t opc, int rs, int rt) argument
2244 gen_mul_vr54xx(DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument
2324 gen_cl(DisasContext *ctx, uint32_t opc, int rd, int rs) argument
2362 gen_trap(DisasContext *ctx, uint32_t opc, int rs, int rt, int16_t imm) argument
2475 gen_compute_branch(DisasContext *ctx, uint32_t opc, int rs, int rt, int32_t offset) argument
2711 gen_bitops(DisasContext *ctx, uint32_t opc, int rt, int rs, int lsb, int msb) argument
5559 gen_cp0(CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int rt, int rd) argument
5800 gen_cp1(DisasContext *ctx, uint32_t opc, int rt, int fs) argument
7250 gen_flt3_ldst(DisasContext *ctx, uint32_t opc, int fd, int fs, int base, int index) argument
7352 gen_flt3_arith(DisasContext *ctx, uint32_t opc, int fd, int fr, int fs, int ft) argument
[all...]
/external/valgrind/main/VEX/priv/
H A Dguest_x86_toIR.c5556 UChar opc,
5577 switch (opc) {
5645 vex_printf("\n0x%x\n", (Int)opc);
5692 name, show_granularity ? nameMMXGran(opc & 3) : "",
5841 UChar opc = getIByte(delta); local
5847 switch (opc) {
5937 delta = dis_MMXop_regmem_to_reg ( sorb, delta, opc, "padd", True );
5944 delta = dis_MMXop_regmem_to_reg ( sorb, delta, opc, "padds", True );
5951 delta = dis_MMXop_regmem_to_reg ( sorb, delta, opc, "paddus", True );
5959 delta = dis_MMXop_regmem_to_reg ( sorb, delta, opc, "psu
5554 dis_MMXop_regmem_to_reg( UChar sorb, Int delta, UChar opc, const HChar* name, Bool show_granularity ) argument
8076 UChar opc, modrm, abyte, pre; local
[all...]
H A Dguest_amd64_toIR.c7039 UChar opc,
7060 switch (opc) {
7128 vex_printf("\n0x%x\n", (Int)opc);
7175 name, show_granularity ? nameMMXGran(opc & 3) : "",
7324 UChar opc = getUChar(delta); local
7330 switch (opc) {
7470 delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "padd", True );
7478 delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "padds", True );
7485 delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "paddus", True );
7493 delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "psu
7036 dis_MMXop_regmem_to_reg( VexAbiInfo* vbi, Prefix pfx, Long delta, UChar opc, const HChar* name, Bool show_granularity ) argument
10217 dis_CVTxSD2SI( VexAbiInfo* vbi, Prefix pfx, Long delta, Bool isAvx, UChar opc, Int sz ) argument
10265 dis_CVTxSS2SI( VexAbiInfo* vbi, Prefix pfx, Long delta, Bool isAvx, UChar opc, Int sz ) argument
11750 UChar opc = getUChar(delta); local
14816 UChar opc = getUChar(delta); local
15296 UChar opc = getUChar(delta); local
15816 UChar opc = getUChar(delta); local
15943 UChar opc = getUChar(delta); local
17341 UChar opc = getUChar(delta); local
18017 dis_PCMPISTRI_3A( UChar modrm, UInt regNoL, UInt regNoR, Long delta, UChar opc, UChar imm, HChar dis_buf[]) argument
18654 UChar opc = getUChar(delta); local
19350 UChar opc = getUChar(delta); delta++; local
21056 UChar opc = getUChar(delta); local
21980 UChar opc = getUChar(delta); local
22065 UChar opc = getUChar(delta); local
23371 UChar opc = getUChar(delta); local
27372 UChar opc = getUChar(delta); local
29529 UChar opc = getUChar(delta); local
[all...]
/external/chromium_org/third_party/freetype/src/truetype/
H A Dttobjs.h179 FT_UInt opc; /* function #, or instruction code */ member in struct:TT_DefRecord_
/external/freetype/src/truetype/
H A Dttobjs.h179 FT_UInt opc; /* function #, or instruction code */ member in struct:TT_DefRecord_
/external/pdfium/core/src/fxge/fx_freetype/fxft2.5.01/src/truetype/
H A Dttobjs.h179 FT_UInt opc; /* function #, or instruction code */ member in struct:TT_DefRecord_
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.cpp407 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 local
410 opc = 2; // 0b0010
415 return ARM_AM::getSOImmVal(Value) | (opc << 21);
420 unsigned opc = 0; local
423 opc = 5;
426 uint32_t out = (opc << 21);

Completed in 503 milliseconds

123