/external/compiler-rt/lib/builtins/arm/ |
H A D | sync_fetch_and_add_4.S | 18 #define add_4(rD, rN, rM) add rD, rN, rM
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H A D | sync_fetch_and_and_4.S | 17 #define and_4(rD, rN, rM) and rD, rN, rM
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H A D | sync_fetch_and_nand_4.S | 17 #define nand_4(rD, rN, rM) bic rD, rN, rM
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H A D | sync_fetch_and_or_4.S | 17 #define or_4(rD, rN, rM) orr rD, rN, rM
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H A D | sync_fetch_and_sub_4.S | 18 #define sub_4(rD, rN, rM) sub rD, rN, rM
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H A D | sync_fetch_and_xor_4.S | 17 #define xor_4(rD, rN, rM) eor rD, rN, rM
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H A D | sync_fetch_and_max_4.S | 17 #define max_4(rD, rN, rM) MINMAX_4(rD, rN, rM, gt)
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H A D | sync_fetch_and_min_4.S | 17 #define min_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lt)
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H A D | sync_fetch_and_umax_4.S | 17 #define umax_4(rD, rN, rM) MINMAX_4(rD, rN, rM, hi)
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H A D | sync_fetch_and_umin_4.S | 17 #define umin_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lo)
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H A D | sync-ops.h | 47 #define MINMAX_4(rD, rN, rM, cmp_kind) \ 48 cmp rN, rM ; \ 51 mov##cmp_kind rD, rN
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/external/lzma/Asm/x86/ |
H A D | 7zCrcOpt.asm | 9 rN equ r7
define 21 SRCDAT equ rN + rD + 4 *
42 dec rN
49 mov rN, num_VAR
51 test rN, rN
59 cmp rN, 16
61 add rN, rD
62 mov num_VAR, rN
63 sub rN, [all...] |
H A D | AesOpt.asm | 19 rN equ r0
define 31 mov rN, num
107 sub rN, ways
110 add rN, ways
124 sub rN, 1
161 sub rN, 1
215 sub rN, ways
218 add rN, ways
231 sub rN, 1
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/external/valgrind/main/VEX/priv/ |
H A D | guest_arm_toIR.c | 2369 IRExpr* mk_EA_reg_plusminus_imm12 ( UInt rN, UInt bU, UInt imm12, argument 2372 vassert(rN < 16); 2376 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm12); 2379 getIRegA(rN), 2388 IRExpr* mk_EA_reg_plusminus_shifted_reg ( UInt rN, UInt bU, UInt rM, argument 2392 vassert(rN < 16); 2403 DIS(buf, "[r%u, %c r%u LSL #%u]", rN, opChar, rM, imm5); 2413 rN, opChar, rM, imm5 == 0 ? 32 : imm5); 2425 rN, opChar, rM, imm5 == 0 ? 32 : imm5); 2436 DIS(buf, "[r%u, %cr%u, RRX]", rN, opCha 2458 mk_EA_reg_plusminus_imm8( UInt rN, UInt bU, UInt imm8, HChar* buf ) argument 2475 mk_EA_reg_plusminus_reg( UInt rN, UInt bU, UInt rM, HChar* buf ) argument 8332 UInt rN = INSN(19,16); local 10919 UInt rD = 99, rN = 99, rM = 99, rA = 99; local 12334 UInt rD = 99, rN = 99, rM = 99, rA = 99; local 12391 UInt rN = 99, rDlo = 99, rDhi = 99, rM = 99; local 12480 UInt rN = 99, rDlo = 99, rDhi = 99, rM = 99; local 12585 mk_ldm_stm( Bool arm, UInt rN, UInt bINC, UInt bBEFORE, UInt bW, UInt bL, UInt regList ) argument 12854 UInt rN = INSN(19,16); local 12991 UInt rN = INSN(19,16); local 13150 UInt rN = INSN(19,16); /* hi32 */ local 13170 UInt rN = INSN(19,16); /* hi32 */ local 13195 UInt rN = INSN(15,12); local 13216 UInt rN = INSN(15,12); local 13286 UInt rN = (INSN(7,7) << 4) | INSN(19,16); local 13427 UInt rN = INSN(19,16); local 13761 UInt rN = INSN(19,16); local 13910 UInt rN = INSN(19,16); local 14406 UInt rN = INSN(19,16); local 14416 UInt rN = INSN(19,16); local 14439 UInt rN = INSN(19,16); local 14709 UInt rN = (insn >> 16) & 0xF; /* 19:16 */ local 15041 { UInt rN = (insn >> 16) & 0xF; /* 19:16 */ local 15269 { UInt rN = (insn >> 16) & 0xF; /* 19:16 */ local 15450 UInt rN = (insn >> 16) & 0xF; local 15690 UInt rN = INSN(3,0); local 15712 UInt rN = INSN(3,0); local 15734 UInt rN = INSN(15,12); local 15888 UInt rN = INSN(3,0); local 15947 UInt rN = INSN(3,0); local 15997 UInt rN = INSN(19,16); local 16054 UInt rN = INSN(19,16); local 16108 UInt rN = INSN(19,16); local 16270 UInt rN = INSN(3,0); local 16314 UInt rN = INSN(3,0); local 16396 { UInt rN = (insn >> 16) & 0xF; /* 19:16 */ local 16556 UInt rN = INSN(19,16); local 16586 UInt rN = INSN(19,16); local 16682 UInt rN = INSN(3,0); local 16704 UInt rN = INSN(3,0); local 16732 UInt rN = INSN(19,16); local 16758 UInt rN = INSN(19,16); local 16787 UInt rN = INSN(19,16); local 16813 UInt rN = INSN(19,16); local 16843 UInt rN = INSN(19,16); local 16872 UInt rN = INSN(19,16); local 16899 UInt rN = INSN(19,16); local 16928 UInt rN = INSN(19,16); local 16955 UInt rN = INSN(19,16); local 16984 UInt rN = INSN(19,16); local 17010 UInt rN = INSN(19,16); local 17035 UInt rN = INSN(19,16); local 17062 UInt rN = INSN(19,16); local 17089 UInt rN = INSN(19,16); local 17113 UInt rN = INSN(19,16); local 17137 UInt rN = INSN(19,16); local 17830 UInt rN = INSN0(2,0); local 17845 UInt rN = INSN0(2,0); local 18291 UInt rN = (h1 << 3) | INSN0(2,0); local 18367 UInt rN = INSN0(2,0); local 18548 UInt rN = INSN0(5,3); local 18569 UInt rN = INSN0(5,3); local 18591 UInt rN = INSN0(5,3); local 18616 UInt rN = INSN0(5,3); local 18639 UInt rN = INSN0(5,3); local 18657 UInt rN = INSN0(5,3); local 18677 UInt rN = INSN0(5,3); local 18711 UInt rN = INSN0(10,8); local 18751 UInt rN = INSN0(10,8); local 18806 UInt rN = INSN0(5,3); local 18831 UInt rN = INSN0(5,3); local 18856 UInt rN = INSN0(5,3); local 18902 UInt rN = INSN0(10,8); local 18948 UInt rN = INSN0(10,8); local 19209 UInt rN = INSN0(3,0); local 19279 UInt rN = INSN0(3,0); local 19306 UInt rN = INSN0(3,0); local 19333 UInt rN = INSN0(3,0); local 19355 UInt rN = INSN0(3,0); local 19387 UInt rN = INSN0(3,0); local 19421 UInt rN = INSN0(3,0); local 19450 UInt rN = INSN0(3,0); local 19506 UInt rN = INSN0(3,0); local 19555 UInt rN = INSN0(3,0); local 19634 UInt rN = INSN0(3,0); local 19703 UInt rN = INSN0(3,0); local 19768 UInt rN = INSN0(3,0); local 19805 UInt rN = INSN1(3,0); local 19847 UInt rN = INSN0(3,0); local 19888 UInt rN = INSN0(3,0); local 20016 UInt rN = INSN0(3,0); local 20208 UInt rN = INSN0(3,0); local 20357 UInt rN = INSN0(3,0); local 20486 UInt rN = INSN0(3,0); local 20661 UInt rN = INSN0(3,0); local 20709 UInt rN = INSN0(3,0); local 20823 UInt rN = INSN0(3,0); local 20838 UInt rN = INSN0(3,0); local 20857 UInt rN = INSN0(3,0); local 20877 UInt rN = INSN0(3,0); local 20898 UInt rN = INSN0(3,0); local 20939 UInt rN = INSN0(3,0); local 20971 UInt rN = INSN0(3,0); local 21011 UInt rN = INSN0(3,0); local 21033 UInt rN = INSN0(3,0); local 21070 UInt rN = INSN0(3,0); local 21116 UInt rN = INSN0(3,0); local 21145 UInt rN = INSN0(3,0); local 21263 UInt rN = INSN0(3,0); local 21290 UInt rN = INSN0(3,0); local 21312 UInt rN = INSN0(3,0); local 21332 UInt rN = INSN0(3,0); local 21354 UInt rN = INSN0(3,0); local 21384 UInt rN = INSN0(3,0); local 21412 UInt rN = INSN0(3,0); local 21483 UInt rN = INSN0(3,0); local 21493 UInt rN = INSN0(3,0); local 21503 UInt rN = INSN0(3,0); local 21556 UInt rN = INSN0(3,0); local 21579 UInt rN = INSN0(3,0); local 21600 UInt rN = INSN0(3,0); local 21621 UInt rN = INSN0(3,0); local 21650 UInt rN = INSN0(3,0); local 21680 UInt rN = INSN0(3,0); local 21701 UInt rN = INSN0(3,0); local 21725 UInt rN = INSN0(3,0); local 21749 UInt rN = INSN0(3,0); local 21763 UInt rN = INSN0(3,0); local [all...] |
H A D | host_arm64_defs.c | 415 //ZZ ARMAModeN *mkARMAModeN_RR ( HReg rN, HReg rM ) { 418 //ZZ am->ARMamN.RR.rN = rN; 423 //ZZ ARMAModeN *mkARMAModeN_R ( HReg rN ) { 426 //ZZ am->ARMamN.R.rN = rN; 432 //ZZ addHRegUse(u, HRmRead, am->ARMamN.R.rN); 434 //ZZ addHRegUse(u, HRmRead, am->ARMamN.RR.rN); 441 //ZZ am->ARMamN.R.rN = lookupHRegRemap(m, am->ARMamN.R.rN); 1516 ARM64Instr_VLdStS( Bool isLoad, HReg sD, HReg rN, UInt uimm12 ) argument 1526 ARM64Instr_VLdStD( Bool isLoad, HReg dD, HReg rN, UInt uimm12 ) argument 4033 UInt rN = iregNo(i->ARM64in.Arith.argL); local 4059 UInt rN = iregNo(i->ARM64in.Cmp.argL); local 4086 UInt rN = iregNo(i->ARM64in.Logic.argL); local 4126 UInt rN = iregNo(i->ARM64in.Test.argL); local 4145 UInt rN = iregNo(i->ARM64in.Shift.argL); local 4700 UInt rN = iregNo(i->ARM64in.VLdStS.rN); local 4717 UInt rN = iregNo(i->ARM64in.VLdStD.rN); local 4734 UInt rN = iregNo(i->ARM64in.VLdStQ.rN); local 4755 UInt rN = iregNo(i->ARM64in.VCvtI2F.rS); local 4802 UInt rN = dregNo(i->ARM64in.VCvtF2I.rS); local 6418 HReg rN = i->ARM64in.VMov.src; local [all...] |
H A D | host_arm64_defs.h | 784 HReg rN; member in struct:__anon31763::__anon31764::__anon31788 791 HReg rN; member in struct:__anon31763::__anon31764::__anon31789 798 HReg rN; // address member in struct:__anon31763::__anon31764::__anon31790 1061 extern ARM64Instr* ARM64Instr_VLdStS ( Bool isLoad, HReg sD, HReg rN, 1063 extern ARM64Instr* ARM64Instr_VLdStD ( Bool isLoad, HReg dD, HReg rN, 1065 extern ARM64Instr* ARM64Instr_VLdStQ ( Bool isLoad, HReg rQ, HReg rN );
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H A D | host_arm_defs.c | 379 ARMAModeN *mkARMAModeN_RR ( HReg rN, HReg rM ) { argument 382 am->ARMamN.RR.rN = rN; 387 ARMAModeN *mkARMAModeN_R ( HReg rN ) { 390 am->ARMamN.R.rN = rN; 396 addHRegUse(u, HRmRead, am->ARMamN.R.rN); 398 addHRegUse(u, HRmRead, am->ARMamN.RR.rN); 405 am->ARMamN.R.rN = lookupHRegRemap(m, am->ARMamN.R.rN); 1518 ARMInstr_Add32( HReg rD, HReg rN, UInt imm32 ) argument 2855 UInt rN = 0; local 2989 UInt rN = iregNo(i->ARMin.Alu.argL); local 3133 HReg rN = am->ARMam2.RI.reg; local 3180 HReg rN = am->ARMam2.RI.reg; local 3523 UInt rN = iregNo(i->ARMin.VLdStD.amode->reg); local 3539 UInt rN = iregNo(i->ARMin.VLdStS.amode->reg); local [all...] |
H A D | host_arm_defs.h | 212 HReg rN; member in struct:__anon31825::__anon31826::__anon31827 216 HReg rN; member in struct:__anon31825::__anon31826::__anon31828 939 /* Note: rD != rN */ 941 HReg rN; member in struct:__anon31854::__anon31855::__anon31901 1014 extern ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 );
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H A D | guest_arm64_toIR.c | 2312 UInt rN = INSN(9,5); local 2321 assign(argL, getIRegOrZR(is64, rN)); 2332 nameIRegOrZR(is64, rD), nameIRegOrZR(is64, rN), 2354 UInt rN = INSN(9,5); local 2367 assign(argL, getIRegOrZR(is64, rN)); 2395 nameIRegOrZR(is64, rD), nameIRegOrZR(is64, rN), 2422 UInt rN = INSN(9,5); local 2430 assign(argL, getIRegOrZR(is64, rN)); 2451 if (rN == 31/*zr*/ && sh == 0/*LSL*/ && imm6 == 0 && bN == 0) { 2456 nameIRegOrZR(is64, rD), nameIRegOrZR(is64, rN), 3322 UInt rN = INSN(9,5); local 4148 UInt rN = INSN(9,5); local 4215 UInt rN = INSN(9,5); local 4247 UInt rN = INSN(9,5); local 4282 UInt rN = INSN(9,5); local 4316 UInt rN = INSN(9,5); local 4349 UInt rN = INSN(9,5); local 4420 UInt rN = INSN(9,5); local [all...] |
H A D | host_arm64_isel.c | 4360 HReg rN = iselIntExpr_R(env, e->Iex.Load.addr); local 4362 addInstr(env, ARM64Instr_VLdStQ(True/*isLoad*/, res, rN)); 6013 HReg rN = get_baseblock_register(); local 6014 addInstr(env, ARM64Instr_VLdStD(True/*isLoad*/, rD, rN, offs)); 6196 HReg rN = get_baseblock_register(); local 6197 addInstr(env, ARM64Instr_VLdStS(True/*isLoad*/, rD, rN, offs));
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/external/chromium_org/third_party/skia/experimental/Intersection/ |
H A D | CubeRoot.cpp | 242 static double TestCubeRootf(const char* szName, cuberootfnf cbrt, double rA, double rB, int rN) argument 244 const int N = rN; 291 static double TestCubeRootd(const char* szName, cuberootfnd cbrt, double rA, double rB, int rN) argument 293 const int N = rN;
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/external/skia/experimental/Intersection/ |
H A D | CubeRoot.cpp | 242 static double TestCubeRootf(const char* szName, cuberootfnf cbrt, double rA, double rB, int rN) argument 244 const int N = rN; 291 static double TestCubeRootd(const char* szName, cuberootfnd cbrt, double rA, double rB, int rN) argument 293 const int N = rN;
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/external/valgrind/main/none/tests/arm/ |
H A D | vfp.stdout.exp | 905 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3 906 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3 907 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3 908 vldmia rN!, qD1; vldmia rN!, qD2 :: Result 0x00000aa0 0x00000bb1 0x00000cc2 0x00000dd3 909 vldmia rN!, qD1; vldmia rN!, qD [all...] |
/external/chromium_org/third_party/x86inc/ |
H A D | x86inc.asm | 144 ; rN and rNq are the native-size register holding function argument N
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/external/chromium_org/third_party/libvpx/source/libvpx/third_party/libyuv/source/ |
H A D | x86inc.asm | 127 ; rN and rNq are the native-size register holding function argument N
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