Searched refs:regs (Results 1 - 25 of 321) sorted by relevance

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/external/oprofile/module/x86/
H A Dop_arch.h18 #define instruction_pointer(regs) ((regs)->eip)
22 #define IRQ_ENABLED(regs) ((regs)->eflags & IF_MASK)
/external/libunwind/src/aarch64/
H A Dgen-offsets.c30 SC ("R0", regs[0]);
31 SC ("R1", regs[1]);
32 SC ("R2", regs[2]);
33 SC ("R3", regs[3]);
34 SC ("R4", regs[4]);
35 SC ("R5", regs[5]);
36 SC ("R6", regs[6]);
37 SC ("R7", regs[7]);
38 SC ("R8", regs[8]);
39 SC ("R9", regs[
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H A DGresume.c43 unsigned long regs[11]; local
44 regs[0] = uc->uc_mcontext.regs[19];
45 regs[1] = uc->uc_mcontext.regs[20];
46 regs[2] = uc->uc_mcontext.regs[21];
47 regs[3] = uc->uc_mcontext.regs[22];
48 regs[
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/external/qemu-pc-bios/vgabios/tests/
H A Dtestbios.c39 void int10ax0003(struct REGPACK *regs) argument
41 regs->r_ax=0x0003;
42 intr(0x10,regs);
45 void int10ax02(struct REGPACK *regs) argument
47 regs->r_ax=0x0200;
48 regs->r_bx=0x0000;
49 regs->r_dx=0x1710;
50 intr(0x10,regs);
54 void int10ax03(struct REGPACK *regs) argument
56 regs
62 int10ax0501(struct REGPACK *regs) argument
72 int10ax0602(struct REGPACK *regs) argument
82 int10ax0702(struct REGPACK *regs) argument
92 int10ax08(struct REGPACK *regs) argument
99 int10ax09(struct REGPACK *regs) argument
114 int10ax0a(struct REGPACK *regs) argument
124 int10ax0f(struct REGPACK *regs) argument
132 int10ax1b(struct REGPACK *regs) argument
156 int10ax13(struct REGPACK *regs) argument
174 switch_50(struct REGPACK *regs) argument
186 exec_function(struct REGPACK *regs) argument
314 show_regs(struct REGPACK *regs) argument
329 struct REGPACK regs; local
339 struct REGPACK regs; local
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/external/libunwind/src/arm/
H A DGresume.c47 unsigned long regs[10]; local
48 regs[0] = uc->regs[4];
49 regs[1] = uc->regs[5];
50 regs[2] = uc->regs[6];
51 regs[3] = uc->regs[7];
52 regs[
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/external/qemu/distrib/sdl-1.2.15/src/video/riscos/
H A DSDL_riscossprite.c49 _kernel_swi_regs regs; local
83 regs.r[0] = 256+9;
84 regs.r[1] = (unsigned int)buffer;
85 _kernel_swi(OS_SpriteOp, &regs, &regs);
87 regs.r[0] = 256+15;
88 regs.r[1] = (unsigned int)buffer;
89 regs.r[2] = (unsigned int)&sprite_name;
90 regs.r[3] = 0; /* Palette flag: 0 = no palette */
91 regs
146 _kernel_swi_regs regs; local
176 _kernel_swi_regs regs; local
214 _kernel_swi_regs regs; local
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H A DSDL_riscostask.c92 _kernel_swi_regs regs; local
102 regs.r[0] = (unsigned int)360; /* Minimum version 3.6 */
103 regs.r[1] = (unsigned int)0x4b534154;
104 regs.r[2] = (unsigned int)task_name;
105 regs.r[3] = (unsigned int)messages;
107 if (_kernel_swi(Wimp_Initialise, &regs, &regs) == 0)
109 wimp_version = regs.r[0];
110 task_handle = regs.r[1];
129 _kernel_swi_regs regs; local
183 _kernel_swi_regs regs; local
273 _kernel_swi_regs regs; local
310 _kernel_swi_regs regs; local
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H A DSDL_wimppoll.c95 _kernel_swi_regs regs; local
107 _kernel_swi(OS_ReadMonotonicTime, &regs, &regs);
108 waitTime += regs.r[0];
120 regs.r[0] = pollMask; /* Poll Mask */
122 if (waitTime < 0) regs.r[0] |= 1;
123 regs.r[1] = (int)message;
124 _kernel_swi(Wimp_Poll, &regs, &regs);
127 regs
308 _kernel_swi_regs regs; local
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/external/ltrace/sysdeps/linux-gnu/aarch64/
H A Dregs.c34 aarch64_read_gregs(struct process *proc, struct user_pt_regs *regs) argument
36 *regs = (struct user_pt_regs) {};
38 iovec.iov_base = regs;
39 iovec.iov_len = sizeof *regs;
45 aarch64_write_gregs(struct process *proc, struct user_pt_regs *regs) argument
48 iovec.iov_base = regs;
49 iovec.iov_len = sizeof *regs;
55 aarch64_read_fregs(struct process *proc, struct user_fpsimd_state *regs) argument
57 *regs = (struct user_fpsimd_state) {};
59 iovec.iov_base = regs;
68 struct user_pt_regs regs; local
88 struct user_pt_regs regs; local
108 struct user_pt_regs regs; local
122 struct user_pt_regs regs; local
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/external/ltrace/sysdeps/linux-gnu/metag/
H A Dregs.c34 struct user_gp_regs regs; local
37 iov.iov_base = &regs;
38 iov.iov_len = sizeof(regs);
42 return (void *)regs.pc; /* PC */
48 struct user_gp_regs regs; local
51 iov.iov_base = &regs;
52 iov.iov_len = sizeof(regs);
56 regs.pc = (unsigned long)addr;
58 iov.iov_base = &regs;
59 iov.iov_len = sizeof(regs);
66 struct user_gp_regs regs; local
80 struct user_gp_regs regs; local
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/external/valgrind/main/none/tests/amd64/
H A DredundantRexW.c39 void pp_XMMRegs ( char* who, XMMRegs* regs ) {
44 pp_UWord128( &regs->reg[i] );
78 void setup_regs_mem ( XMMRegs* regs, Mem* mem ) { argument
83 regs->reg[i].b[j] = 0x51 + (ctr++ % 7);
91 void before_test ( XMMRegs* regs, Mem* mem ) { argument
92 setup_regs_mem( regs, mem );
95 void after_test ( char* who, XMMRegs* regs, Mem* mem ) { argument
100 xor_XMMRegs( regs, &rdiff );
151 before_test( regs, mem );
159 : /*out*/ : /*in*/ "r"(regs), "
169 XMMRegs* regs; local
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/form/
H A DForm23x.java46 RegisterSpecList regs = insn.getRegisters();
47 return regs.get(0).regString() + ", " + regs.get(1).regString() +
48 ", " + regs.get(2).regString();
67 RegisterSpecList regs = insn.getRegisters();
70 (regs.size() == 3) &&
71 unsignedFitsInByte(regs.get(0).getReg()) &&
72 unsignedFitsInByte(regs.get(1).getReg()) &&
73 unsignedFitsInByte(regs.get(2).getReg());
79 RegisterSpecList regs
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H A DForm33x.java46 RegisterSpecList regs = insn.getRegisters();
47 return regs.get(0).regString() + ", " + regs.get(1).regString() +
48 ", " + regs.get(2).regString();
71 RegisterSpecList regs = insn.getRegisters();
74 (regs.size() == 3) &&
75 unsignedFitsInByte(regs.get(0).getReg()) &&
76 unsignedFitsInByte(regs.get(1).getReg()) &&
77 unsignedFitsInShort(regs.get(2).getReg());
83 RegisterSpecList regs
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H A DForm12x.java47 RegisterSpecList regs = insn.getRegisters();
48 int sz = regs.size();
56 return regs.get(sz - 2).regString() + ", " +
57 regs.get(sz - 1).regString();
80 RegisterSpecList regs = insn.getRegisters();
84 switch (regs.size()) {
86 rs1 = regs.get(0);
87 rs2 = regs.get(1);
95 rs1 = regs.get(1);
96 rs2 = regs
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H A DForm22t.java46 RegisterSpecList regs = insn.getRegisters();
47 return regs.get(0).regString() + ", " + regs.get(1).regString() +
66 RegisterSpecList regs = insn.getRegisters();
69 (regs.size() == 2) &&
70 unsignedFitsInNibble(regs.get(0).getReg()) &&
71 unsignedFitsInNibble(regs.get(1).getReg()))) {
82 RegisterSpecList regs = insn.getRegisters();
85 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg()));
86 bits.set(1, unsignedFitsInNibble(regs
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H A DForm22x.java46 RegisterSpecList regs = insn.getRegisters();
47 return regs.get(0).regString() + ", " + regs.get(1).regString();
66 RegisterSpecList regs = insn.getRegisters();
69 (regs.size() == 2) &&
70 unsignedFitsInByte(regs.get(0).getReg()) &&
71 unsignedFitsInShort(regs.get(1).getReg());
77 RegisterSpecList regs = insn.getRegisters();
80 bits.set(0, unsignedFitsInByte(regs.get(0).getReg()));
81 bits.set(1, unsignedFitsInShort(regs
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H A DForm32x.java46 RegisterSpecList regs = insn.getRegisters();
47 return regs.get(0).regString() + ", " + regs.get(1).regString();
66 RegisterSpecList regs = insn.getRegisters();
68 (regs.size() == 2) &&
69 unsignedFitsInShort(regs.get(0).getReg()) &&
70 unsignedFitsInShort(regs.get(1).getReg());
76 RegisterSpecList regs = insn.getRegisters();
79 bits.set(0, unsignedFitsInShort(regs.get(0).getReg()));
80 bits.set(1, unsignedFitsInShort(regs
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/external/chromium_org/third_party/mesa/src/src/mesa/program/
H A Dregister_allocate.c90 struct ra_reg *regs; member in struct:ra_regs
98 GLboolean *regs; member in struct:ra_class
103 * This is "how many regs are in the set."
146 struct ra_regs *regs; member in struct:ra_graph
167 struct ra_regs *regs; local
169 regs = rzalloc(mem_ctx, struct ra_regs);
170 regs->count = count;
171 regs->regs = rzalloc_array(regs, struc
187 ra_add_conflict_list(struct ra_regs *regs, unsigned int r1, unsigned int r2) argument
201 ra_add_reg_conflict(struct ra_regs *regs, unsigned int r1, unsigned int r2) argument
218 ra_add_transitive_reg_conflict(struct ra_regs *regs, unsigned int base_reg, unsigned int reg) argument
231 ra_alloc_reg_class(struct ra_regs *regs) argument
247 ra_class_add_reg(struct ra_regs *regs, unsigned int c, unsigned int r) argument
260 ra_set_finalize(struct ra_regs *regs) argument
304 ra_alloc_interference_graph(struct ra_regs *regs, unsigned int count) argument
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/external/mesa3d/src/mesa/program/
H A Dregister_allocate.c90 struct ra_reg *regs; member in struct:ra_regs
98 GLboolean *regs; member in struct:ra_class
103 * This is "how many regs are in the set."
146 struct ra_regs *regs; member in struct:ra_graph
167 struct ra_regs *regs; local
169 regs = rzalloc(mem_ctx, struct ra_regs);
170 regs->count = count;
171 regs->regs = rzalloc_array(regs, struc
187 ra_add_conflict_list(struct ra_regs *regs, unsigned int r1, unsigned int r2) argument
201 ra_add_reg_conflict(struct ra_regs *regs, unsigned int r1, unsigned int r2) argument
218 ra_add_transitive_reg_conflict(struct ra_regs *regs, unsigned int base_reg, unsigned int reg) argument
231 ra_alloc_reg_class(struct ra_regs *regs) argument
247 ra_class_add_reg(struct ra_regs *regs, unsigned int c, unsigned int r) argument
260 ra_set_finalize(struct ra_regs *regs) argument
304 ra_alloc_interference_graph(struct ra_regs *regs, unsigned int count) argument
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/external/chromium_org/third_party/mesa/src/src/mesa/x86-64/
H A Dx86-64.c44 extern void _mesa_x86_64_cpuid(unsigned int *regs);
77 unsigned int regs[4]; local
93 regs[0] = 0x80000001;
94 regs[1] = 0x00000000;
95 regs[2] = 0x00000000;
96 regs[3] = 0x00000000;
97 _mesa_x86_64_cpuid(regs);
98 if (regs[3] & (1U << 31)) {
/external/mesa3d/src/mesa/x86-64/
H A Dx86-64.c44 extern void _mesa_x86_64_cpuid(unsigned int *regs);
77 unsigned int regs[4]; local
93 regs[0] = 0x80000001;
94 regs[1] = 0x00000000;
95 regs[2] = 0x00000000;
96 regs[3] = 0x00000000;
97 _mesa_x86_64_cpuid(regs);
98 if (regs[3] & (1U << 31)) {
/external/valgrind/main/coregrind/m_gdbserver/
H A Dregdef.h43 ``regs'', with ``n'' elements. */
45 void set_register_cache (struct reg *regs, int n);
/external/valgrind/main/coregrind/
H A Dm_debugger.c53 struct vki_user_regs_struct regs; local
54 VG_(memset)(&regs, 0, sizeof(regs));
55 regs.cs = vex->guest_CS;
56 regs.ss = vex->guest_SS;
57 regs.ds = vex->guest_DS;
58 regs.es = vex->guest_ES;
59 regs.fs = vex->guest_FS;
60 regs.gs = vex->guest_GS;
61 regs
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/external/qemu/distrib/sdl-1.2.15/src/joystick/riscos/
H A DSDL_sysjoystick.c57 _kernel_swi_regs regs; local
60 regs.r[0] = 0;
61 if (_kernel_swi(JOYSTICK_READ, &regs, &regs) == NULL)
90 _kernel_swi_regs regs; local
95 regs.r[0] = joystick->index;
116 _kernel_swi_regs regs; local
117 regs.r[0] = joystick->index;
119 if (_kernel_swi(JOYSTICK_READ, &regs, &regs)
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/external/ltrace/sysdeps/linux-gnu/sparc/
H A Dregs.c35 return (void *)a->regs.pc;
44 a->regs.pc = (long)addr;
52 return (void *)a->regs.u_regs[UREG_I5];
64 t = ptrace(PTRACE_PEEKTEXT, proc->pid, a->regs.u_regs[UREG_I6] + 8, 0);
66 return (void *)a->regs.u_regs[UREG_I6] + 12;
67 return (void *)a->regs.u_regs[UREG_I6] + 8;

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