Searched refs:rmesa (Results 1 - 25 of 112) sorted by relevance

12345

/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
H A Dr200_cmdbuf.c55 void r200SetUpAtomList( r200ContextPtr rmesa )
59 mtu = rmesa->radeon.glCtx->Const.MaxTextureUnits;
61 make_empty_list(&rmesa->radeon.hw.atomlist);
62 rmesa->radeon.hw.atomlist.name = "atom-list";
64 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.ctx );
65 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.set );
66 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa
116 r200EmitVbufPrim( r200ContextPtr rmesa, GLuint primitive, GLuint vertex_nr ) argument
137 r200FireEB(r200ContextPtr rmesa, int vertex_count, int type) argument
162 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
184 r200AllocEltsOpenEnded( r200ContextPtr rmesa, GLuint primitive, GLuint min_nr ) argument
210 r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count) argument
220 r200EmitVertexAOS( r200ContextPtr rmesa, GLuint vertex_size, struct radeon_bo *bo, GLuint offset ) argument
239 r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset) argument
[all...]
H A Dr200_sanity.h4 extern int r200SanityCmdBuffer( r200ContextPtr rmesa,
H A Dr200_ioctl.h48 extern void r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count);
49 extern void r200EmitVertexAOS( r200ContextPtr rmesa,
54 extern void r200EmitVbufPrim( r200ContextPtr rmesa,
60 extern GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
64 extern void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset);
68 void r200SetUpAtomList( r200ContextPtr rmesa );
76 #define R200_NEWPRIM( rmesa ) \
78 if ( rmesa->radeon.dma.flush ) \
79 rmesa->radeon.dma.flush( rmesa
106 R200_DB_STATECHANGE( r200ContextPtr rmesa, struct radeon_state_atom *atom ) argument
[all...]
H A Dr200_state_init.c166 static int cmdpkt( r200ContextPtr rmesa, int id ) argument
224 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
225 (void) rmesa; \
232 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
233 return (!rmesa->radeon.TclFallback && !ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
239 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
240 return (!rmesa->radeon.TclFallback && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
246 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
248 return (!rmesa->radeon.TclFallback && ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
257 CHECK( texenv, (rmesa
[all...]
H A Dr200_state.c69 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
70 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC];
75 R200_STATECHANGE( rmesa, ctx );
107 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc;
113 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
114 R200_STATECHANGE( rmesa, ctx );
119 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3] );
204 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
205 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &
215 R200_STATECHANGE( rmesa, ct
325 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
360 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
378 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
494 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
531 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
554 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
575 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
643 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
664 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
679 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
716 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
733 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
760 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
834 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
870 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
883 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
985 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1080 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1141 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1260 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1272 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1306 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1348 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1360 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1385 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1429 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1441 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1541 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1621 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1677 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1703 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1718 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2100 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2131 upload_matrix( r200ContextPtr rmesa, GLfloat *src, int idx ) argument
2147 upload_matrix_t( r200ContextPtr rmesa, const GLfloat *src, int idx ) argument
2157 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
2215 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2265 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2367 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
[all...]
H A Dradeon_dma.c140 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
144 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32);
148 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
175 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
182 radeonAllocDmaRegion( rmesa, &aos->bo, &aos->offset, size * 4, 32 );
186 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
204 void radeon_init_dma(radeonContextPtr rmesa) argument
206 make_empty_list(&rmesa->dma.free);
207 make_empty_list(&rmesa->dma.wait);
208 make_empty_list(&rmesa
212 radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size) argument
265 radeonAllocDmaRegion(radeonContextPtr rmesa, struct radeon_bo **pbo, int *poffset, int bytes, int alignment) argument
295 radeonFreeDmaRegions(radeonContextPtr rmesa) argument
321 radeonReturnDmaRegion(radeonContextPtr rmesa, int return_bytes) argument
343 radeonReleaseDmaRegions(radeonContextPtr rmesa) argument
423 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
452 rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) argument
[all...]
H A Dr200_swtcl.c64 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = (ATTR); \
65 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = (STYLE); \
66 rmesa->radeon.swtcl.vertex_attr_count++; \
72 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = 0; \
73 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = EMIT_PAD; \
74 rmesa
80 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
238 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
290 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
356 r200_alloc_verts( r200ContextPtr rmesa, GLuint n, GLuint size) argument
571 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
610 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
636 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
648 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
680 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
750 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
920 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
[all...]
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dr200_cmdbuf.c55 void r200SetUpAtomList( r200ContextPtr rmesa )
59 mtu = rmesa->radeon.glCtx->Const.MaxTextureUnits;
61 make_empty_list(&rmesa->radeon.hw.atomlist);
62 rmesa->radeon.hw.atomlist.name = "atom-list";
64 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.ctx );
65 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.set );
66 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa
116 r200EmitVbufPrim( r200ContextPtr rmesa, GLuint primitive, GLuint vertex_nr ) argument
137 r200FireEB(r200ContextPtr rmesa, int vertex_count, int type) argument
162 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
184 r200AllocEltsOpenEnded( r200ContextPtr rmesa, GLuint primitive, GLuint min_nr ) argument
210 r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count) argument
220 r200EmitVertexAOS( r200ContextPtr rmesa, GLuint vertex_size, struct radeon_bo *bo, GLuint offset ) argument
239 r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset) argument
[all...]
H A Dr200_sanity.h4 extern int r200SanityCmdBuffer( r200ContextPtr rmesa,
H A Dr200_ioctl.h48 extern void r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count);
49 extern void r200EmitVertexAOS( r200ContextPtr rmesa,
54 extern void r200EmitVbufPrim( r200ContextPtr rmesa,
60 extern GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
64 extern void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset);
68 void r200SetUpAtomList( r200ContextPtr rmesa );
76 #define R200_NEWPRIM( rmesa ) \
78 if ( rmesa->radeon.dma.flush ) \
79 rmesa->radeon.dma.flush( rmesa
106 R200_DB_STATECHANGE( r200ContextPtr rmesa, struct radeon_state_atom *atom ) argument
[all...]
H A Dr200_state_init.c166 static int cmdpkt( r200ContextPtr rmesa, int id ) argument
224 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
225 (void) rmesa; \
232 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
233 return (!rmesa->radeon.TclFallback && !ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
239 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
240 return (!rmesa->radeon.TclFallback && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
246 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
248 return (!rmesa->radeon.TclFallback && ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
257 CHECK( texenv, (rmesa
[all...]
H A Dr200_state.c69 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
70 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC];
75 R200_STATECHANGE( rmesa, ctx );
107 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc;
113 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
114 R200_STATECHANGE( rmesa, ctx );
119 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3] );
204 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
205 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &
215 R200_STATECHANGE( rmesa, ct
325 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
360 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
378 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
494 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
531 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
554 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
575 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
643 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
664 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
679 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
716 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
733 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
760 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
834 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
870 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
883 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
985 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1080 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1141 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1260 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1272 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1306 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1348 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1360 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1385 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1429 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1441 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1541 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1621 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1677 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1703 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1718 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2100 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2131 upload_matrix( r200ContextPtr rmesa, GLfloat *src, int idx ) argument
2147 upload_matrix_t( r200ContextPtr rmesa, const GLfloat *src, int idx ) argument
2157 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
2215 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2265 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2367 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
[all...]
H A Dradeon_dma.c140 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
144 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32);
148 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
175 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
182 radeonAllocDmaRegion( rmesa, &aos->bo, &aos->offset, size * 4, 32 );
186 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
204 void radeon_init_dma(radeonContextPtr rmesa) argument
206 make_empty_list(&rmesa->dma.free);
207 make_empty_list(&rmesa->dma.wait);
208 make_empty_list(&rmesa
212 radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size) argument
265 radeonAllocDmaRegion(radeonContextPtr rmesa, struct radeon_bo **pbo, int *poffset, int bytes, int alignment) argument
295 radeonFreeDmaRegions(radeonContextPtr rmesa) argument
321 radeonReturnDmaRegion(radeonContextPtr rmesa, int return_bytes) argument
343 radeonReleaseDmaRegions(radeonContextPtr rmesa) argument
423 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
452 rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) argument
[all...]
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/
H A Dradeon_ioctl.c65 void radeonSetUpAtomList( r100ContextPtr rmesa )
67 int i, mtu = rmesa->radeon.glCtx->Const.MaxTextureUnits;
69 make_empty_list(&rmesa->radeon.hw.atomlist);
70 rmesa->radeon.hw.atomlist.name = "atom-list";
72 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.ctx);
73 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.set);
74 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa
99 radeonEmitScissor(r100ContextPtr rmesa) argument
124 radeonEmitVbufPrim( r100ContextPtr rmesa, GLuint vertex_format, GLuint primitive, GLuint vertex_nr ) argument
171 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
216 radeonAllocEltsOpenEnded( r100ContextPtr rmesa, GLuint vertex_format, GLuint primitive, GLuint min_nr ) argument
276 radeonEmitVertexAOS( r100ContextPtr rmesa, GLuint vertex_size, struct radeon_bo *bo, GLuint offset ) argument
302 radeonEmitAOS( r100ContextPtr rmesa, GLuint nr, GLuint offset ) argument
383 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
[all...]
H A Dradeon_sanity.h4 extern int radeonSanityCmdBuffer( r100ContextPtr rmesa,
H A Dradeon_ioctl.h43 extern void radeonEmitVertexAOS( r100ContextPtr rmesa,
48 extern void radeonEmitVbufPrim( r100ContextPtr rmesa,
56 extern GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
62 extern void radeonEmitAOS( r100ContextPtr rmesa,
66 extern void radeonEmitBlit( r100ContextPtr rmesa,
76 extern void radeonEmitWait( r100ContextPtr rmesa, GLuint flags );
78 extern void radeonFlushCmdBuf( r100ContextPtr rmesa, const char * );
83 extern void radeonGetAllParams( r100ContextPtr rmesa );
84 extern void radeonSetUpAtomList( r100ContextPtr rmesa );
92 #define RADEON_NEWPRIM( rmesa ) \
113 RADEON_DB_STATECHANGE(r100ContextPtr rmesa, struct radeon_state_atom *atom ) argument
[all...]
H A Dradeon_context.c96 r100ContextPtr rmesa = (r100ContextPtr)radeon; local
99 RADEON_STATECHANGE(rmesa, ctx);
100 if (rmesa->radeon.sarea->tiling_enabled) {
101 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
104 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
108 if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
109 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
113 static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa) argument
119 r100ContextPtr rmesa = (r100ContextPtr)radeon; local
122 rmesa
128 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
176 r100ContextPtr rmesa; local
[all...]
H A Dradeon_tcl.c108 #define LOCAL_VARS r100ContextPtr rmesa = R100_CONTEXT(ctx)
114 #define GET_MESA_ELTS() rmesa->tcl.Elts
128 RADEON_STATECHANGE( rmesa, lin ); \
129 radeonEmitState(&rmesa->radeon); \
133 RADEON_STATECHANGE( rmesa, lin ); \
135 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
138 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
140 radeonEmitState(&rmesa->radeon); \
145 #define ALLOC_ELTS(nr) radeonAllocElts( rmesa, nr )
147 static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuin argument
173 r100ContextPtr rmesa = R100_CONTEXT( ctx ); local
251 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
285 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
357 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
454 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
483 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
543 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
[all...]
H A Dradeon_dma.c140 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
144 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32);
148 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
175 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
182 radeonAllocDmaRegion( rmesa, &aos->bo, &aos->offset, size * 4, 32 );
186 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
204 void radeon_init_dma(radeonContextPtr rmesa) argument
206 make_empty_list(&rmesa->dma.free);
207 make_empty_list(&rmesa->dma.wait);
208 make_empty_list(&rmesa
212 radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size) argument
265 radeonAllocDmaRegion(radeonContextPtr rmesa, struct radeon_bo **pbo, int *poffset, int bytes, int alignment) argument
295 radeonFreeDmaRegions(radeonContextPtr rmesa) argument
321 radeonReturnDmaRegion(radeonContextPtr rmesa, int return_bytes) argument
343 radeonReleaseDmaRegions(radeonContextPtr rmesa) argument
423 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
452 rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) argument
[all...]
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_ioctl.c65 void radeonSetUpAtomList( r100ContextPtr rmesa )
67 int i, mtu = rmesa->radeon.glCtx->Const.MaxTextureUnits;
69 make_empty_list(&rmesa->radeon.hw.atomlist);
70 rmesa->radeon.hw.atomlist.name = "atom-list";
72 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.ctx);
73 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.set);
74 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa
99 radeonEmitScissor(r100ContextPtr rmesa) argument
124 radeonEmitVbufPrim( r100ContextPtr rmesa, GLuint vertex_format, GLuint primitive, GLuint vertex_nr ) argument
171 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
216 radeonAllocEltsOpenEnded( r100ContextPtr rmesa, GLuint vertex_format, GLuint primitive, GLuint min_nr ) argument
276 radeonEmitVertexAOS( r100ContextPtr rmesa, GLuint vertex_size, struct radeon_bo *bo, GLuint offset ) argument
302 radeonEmitAOS( r100ContextPtr rmesa, GLuint nr, GLuint offset ) argument
383 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
[all...]
H A Dradeon_sanity.h4 extern int radeonSanityCmdBuffer( r100ContextPtr rmesa,
H A Dradeon_ioctl.h43 extern void radeonEmitVertexAOS( r100ContextPtr rmesa,
48 extern void radeonEmitVbufPrim( r100ContextPtr rmesa,
56 extern GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
62 extern void radeonEmitAOS( r100ContextPtr rmesa,
66 extern void radeonEmitBlit( r100ContextPtr rmesa,
76 extern void radeonEmitWait( r100ContextPtr rmesa, GLuint flags );
78 extern void radeonFlushCmdBuf( r100ContextPtr rmesa, const char * );
83 extern void radeonGetAllParams( r100ContextPtr rmesa );
84 extern void radeonSetUpAtomList( r100ContextPtr rmesa );
92 #define RADEON_NEWPRIM( rmesa ) \
113 RADEON_DB_STATECHANGE(r100ContextPtr rmesa, struct radeon_state_atom *atom ) argument
[all...]
H A Dradeon_context.c96 r100ContextPtr rmesa = (r100ContextPtr)radeon; local
99 RADEON_STATECHANGE(rmesa, ctx);
100 if (rmesa->radeon.sarea->tiling_enabled) {
101 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
104 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
108 if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
109 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
113 static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa) argument
119 r100ContextPtr rmesa = (r100ContextPtr)radeon; local
122 rmesa
128 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
176 r100ContextPtr rmesa; local
[all...]
H A Dradeon_tcl.c108 #define LOCAL_VARS r100ContextPtr rmesa = R100_CONTEXT(ctx)
114 #define GET_MESA_ELTS() rmesa->tcl.Elts
128 RADEON_STATECHANGE( rmesa, lin ); \
129 radeonEmitState(&rmesa->radeon); \
133 RADEON_STATECHANGE( rmesa, lin ); \
135 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
138 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
140 radeonEmitState(&rmesa->radeon); \
145 #define ALLOC_ELTS(nr) radeonAllocElts( rmesa, nr )
147 static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuin argument
173 r100ContextPtr rmesa = R100_CONTEXT( ctx ); local
251 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
285 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
357 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
454 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
483 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
543 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
[all...]
H A Dradeon_dma.c140 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
144 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32);
148 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
175 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
182 radeonAllocDmaRegion( rmesa, &aos->bo, &aos->offset, size * 4, 32 );
186 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
204 void radeon_init_dma(radeonContextPtr rmesa) argument
206 make_empty_list(&rmesa->dma.free);
207 make_empty_list(&rmesa->dma.wait);
208 make_empty_list(&rmesa
212 radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size) argument
265 radeonAllocDmaRegion(radeonContextPtr rmesa, struct radeon_bo **pbo, int *poffset, int bytes, int alignment) argument
295 radeonFreeDmaRegions(radeonContextPtr rmesa) argument
321 radeonReturnDmaRegion(radeonContextPtr rmesa, int return_bytes) argument
343 radeonReleaseDmaRegions(radeonContextPtr rmesa) argument
423 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
452 rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) argument
[all...]

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