Searched refs:rn (Results 1 - 25 of 78) sorted by relevance

1234

/external/chromium_org/third_party/mesa/src/src/mapi/glapi/gen/
H A Dnext_available_offset.sh36 sort -rn |\
/external/clang/test/CodeGen/
H A Darm-asm-variable.c27 register unsigned int rn asm("r14");
31 asm volatile ("sub %1, %1, #32" : "=r"(d) : "r"(rn));
/external/mesa3d/src/mapi/glapi/gen/
H A Dnext_available_offset.sh36 sort -rn |\
/external/linux-tools-perf/perf-3.12.0/tools/perf/util/
H A Dintlist.h45 struct rb_node *rn = rb_first(&ilist->rblist.entries); local
46 return rn ? rb_entry(rn, struct int_node, rb_node) : NULL;
50 struct rb_node *rn; local
53 rn = rb_next(&in->rb_node);
54 return rn ? rb_entry(rn, struct int_node, rb_node) : NULL;
H A Dstrlist.h47 struct rb_node *rn = rb_first(&slist->rblist.entries); local
48 return rn ? rb_entry(rn, struct str_node, rb_node) : NULL;
52 struct rb_node *rn; local
55 rn = rb_next(&sn->rb_node);
56 return rn ? rb_entry(rn, struct str_node, rb_node) : NULL;
/external/vixl/src/a64/
H A Dmacro-assembler-a64.h100 const Register& rn,
103 const Register& rn,
106 const Register& rn,
109 const Register& rn,
112 const Register& rn,
115 const Register& rn,
118 const Register& rn,
121 const Register& rn,
123 void Tst(const Register& rn, const Operand& operand);
125 const Register& rn,
348 Asr(const Register& rd, const Register& rn, unsigned shift) argument
354 Asr(const Register& rd, const Register& rn, const Register& rm) argument
389 Bfi(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
398 Bfxil(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
439 Cinc(const Register& rd, const Register& rn, Condition cond) argument
445 Cinv(const Register& rd, const Register& rn, Condition cond) argument
451 Cls(const Register& rd, const Register& rn) argument
457 Clz(const Register& rd, const Register& rn) argument
463 Cneg(const Register& rd, const Register& rn, Condition cond) argument
479 Csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
490 Csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
501 Csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
520 Extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument
637 Fmov(FPRegister fd, Register rn) argument
772 Lsl(const Register& rd, const Register& rn, unsigned shift) argument
778 Lsl(const Register& rd, const Register& rn, const Register& rm) argument
785 Lsr(const Register& rd, const Register& rn, unsigned shift) argument
791 Lsr(const Register& rd, const Register& rn, const Register& rm) argument
798 Madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
809 Mneg(const Register& rd, const Register& rn, const Register& rm) argument
816 Mov(const Register& rd, const Register& rn) argument
835 Msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
846 Mul(const Register& rd, const Register& rn, const Register& rm) argument
857 Rbit(const Register& rd, const Register& rn) argument
868 Rev(const Register& rd, const Register& rn) argument
874 Rev16(const Register& rd, const Register& rn) argument
880 Rev32(const Register& rd, const Register& rn) argument
892 Ror(const Register& rd, const Register& rn, const Register& rm) argument
899 Sbfiz(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
908 Sbfx(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
917 Scvtf(const FPRegister& fd, const Register& rn, unsigned fbits = 0) argument
922 Sdiv(const Register& rd, const Register& rn, const Register& rm) argument
929 Smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
940 Smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
951 Smull(const Register& rd, const Register& rn, const Register& rm) argument
977 Sxtb(const Register& rd, const Register& rn) argument
983 Sxth(const Register& rd, const Register& rn) argument
989 Sxtw(const Register& rd, const Register& rn) argument
1005 Ubfiz(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
1014 Ubfx(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
1023 Ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits = 0) argument
1028 Udiv(const Register& rd, const Register& rn, const Register& rm) argument
1035 Umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1046 Umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1067 Uxtb(const Register& rd, const Register& rn) argument
1073 Uxth(const Register& rd, const Register& rn) argument
1079 Uxtw(const Register& rd, const Register& rn) argument
[all...]
H A Dassembler-a64.cc545 const Register& rn,
547 AddSub(rd, rn, operand, LeaveFlags, ADD);
552 const Register& rn,
554 AddSub(rd, rn, operand, SetFlags, ADD);
558 void Assembler::cmn(const Register& rn, argument
560 Register zr = AppropriateZeroRegFor(rn);
561 adds(zr, rn, operand);
566 const Register& rn,
568 AddSub(rd, rn, operand, LeaveFlags, SUB);
573 const Register& rn,
544 add(const Register& rd, const Register& rn, const Operand& operand) argument
551 adds(const Register& rd, const Register& rn, const Operand& operand) argument
565 sub(const Register& rd, const Register& rn, const Operand& operand) argument
572 subs(const Register& rd, const Register& rn, const Operand& operand) argument
579 cmp(const Register& rn, const Operand& operand) argument
597 adc(const Register& rd, const Register& rn, const Operand& operand) argument
604 adcs(const Register& rd, const Register& rn, const Operand& operand) argument
611 sbc(const Register& rd, const Register& rn, const Operand& operand) argument
618 sbcs(const Register& rd, const Register& rn, const Operand& operand) argument
638 and_(const Register& rd, const Register& rn, const Operand& operand) argument
645 ands(const Register& rd, const Register& rn, const Operand& operand) argument
652 tst(const Register& rn, const Operand& operand) argument
654 ands(AppropriateZeroRegFor(rn), rn, operand); local
658 bic(const Register& rd, const Register& rn, const Operand& operand) argument
665 bics(const Register& rd, const Register& rn, const Operand& operand) argument
672 orr(const Register& rd, const Register& rn, const Operand& operand) argument
679 orn(const Register& rd, const Register& rn, const Operand& operand) argument
686 eor(const Register& rd, const Register& rn, const Operand& operand) argument
693 eon(const Register& rd, const Register& rn, const Operand& operand) argument
700 lslv(const Register& rd, const Register& rn, const Register& rm) argument
709 lsrv(const Register& rd, const Register& rn, const Register& rm) argument
718 asrv(const Register& rd, const Register& rn, const Register& rm) argument
727 rorv(const Register& rd, const Register& rn, const Register& rm) argument
737 bfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
748 sbfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
759 ubfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
770 extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument
781 csel(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
789 csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
797 csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
805 csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
827 cinc(const Register &rd, const Register &rn, Condition cond) argument
833 cinv(const Register &rd, const Register &rn, Condition cond) argument
839 cneg(const Register &rd, const Register &rn, Condition cond) argument
845 ConditionalSelect(const Register& rd, const Register& rn, const Register& rm, Condition cond, ConditionalSelectOp op) argument
856 ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
864 ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
872 DataProcessing3Source(const Register& rd, const Register& rn, const Register& rm, const Register& ra, DataProcessing3SourceOp op) argument
881 mul(const Register& rd, const Register& rn, const Register& rm) argument
889 madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
897 mneg(const Register& rd, const Register& rn, const Register& rm) argument
905 msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
913 umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
923 smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
933 umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
943 smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
953 smull(const Register& rd, const Register& rn, const Register& rm) argument
962 sdiv(const Register& rd, const Register& rn, const Register& rm) argument
978 udiv(const Register& rd, const Register& rn, const Register& rm) argument
987 rbit(const Register& rd, const Register& rn) argument
993 rev16(const Register& rd, const Register& rn) argument
999 rev32(const Register& rd, const Register& rn) argument
1006 rev(const Register& rd, const Register& rn) argument
1012 clz(const Register& rd, const Register& rn) argument
1018 cls(const Register& rd, const Register& rn) argument
1238 fmov(const FPRegister& fd, const Register& rn) argument
1486 scvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
1498 ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
1583 AddSub(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubOp op) argument
1620 AddSubWithCarry(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubWithCarryOp op) argument
1644 Logical(const Register& rd, const Register& rn, const Operand& operand, LogicalOp op) argument
1680 LogicalImmediate(const Register& rd, const Register& rn, unsigned n, unsigned imm_s, unsigned imm_r, LogicalOp op) argument
1694 ConditionalCompare(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond, ConditionalCompareOp op) argument
1712 DataProcessing1Source(const Register& rd, const Register& rn, DataProcessing1SourceOp op) argument
1747 EmitShift(const Register& rd, const Register& rn, Shift shift, unsigned shift_amount) argument
1770 EmitExtendShift(const Register& rd, const Register& rn, Extend extend, unsigned left_shift) argument
1807 DataProcShiftedRegister(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, Instr op) argument
1821 DataProcExtendedRegister(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, Instr op) argument
[all...]
H A Dassembler-a64.h739 const Register& rn,
744 const Register& rn,
748 void cmn(const Register& rn, const Operand& operand);
752 const Register& rn,
757 const Register& rn,
761 void cmp(const Register& rn, const Operand& operand);
773 const Register& rn,
778 const Register& rn,
783 const Register& rn,
788 const Register& rn,
[all...]
H A Dmacro-assembler-a64.cc50 const Register& rn,
53 LogicalMacro(rd, rn, operand, AND);
58 const Register& rn,
61 LogicalMacro(rd, rn, operand, ANDS);
65 void MacroAssembler::Tst(const Register& rn, argument
68 Ands(AppropriateZeroRegFor(rn), rn, operand); local
73 const Register& rn,
76 LogicalMacro(rd, rn, operand, BIC);
81 const Register& rn,
49 And(const Register& rd, const Register& rn, const Operand& operand) argument
57 Ands(const Register& rd, const Register& rn, const Operand& operand) argument
72 Bic(const Register& rd, const Register& rn, const Operand& operand) argument
80 Bics(const Register& rd, const Register& rn, const Operand& operand) argument
88 Orr(const Register& rd, const Register& rn, const Operand& operand) argument
96 Orn(const Register& rd, const Register& rn, const Operand& operand) argument
104 Eor(const Register& rd, const Register& rn, const Operand& operand) argument
112 Eon(const Register& rd, const Register& rn, const Operand& operand) argument
120 LogicalMacro(const Register& rd, const Register& rn, const Operand& operand, LogicalOp op) argument
386 Ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
399 Ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
412 ConditionalCompareMacro(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond, ConditionalCompareOp op) argument
434 Csel(const Register& rd, const Register& rn, const Operand& operand, Condition cond) argument
472 Add(const Register& rd, const Register& rn, const Operand& operand) argument
484 Adds(const Register& rd, const Register& rn, const Operand& operand) argument
496 Sub(const Register& rd, const Register& rn, const Operand& operand) argument
508 Subs(const Register& rd, const Register& rn, const Operand& operand) argument
520 Cmn(const Register& rn, const Operand& operand) argument
522 Adds(AppropriateZeroRegFor(rn), rn, operand); local
526 Cmp(const Register& rn, const Operand& operand) argument
528 Subs(AppropriateZeroRegFor(rn), rn, operand); local
600 AddSubMacro(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubOp op) argument
624 Adc(const Register& rd, const Register& rn, const Operand& operand) argument
632 Adcs(const Register& rd, const Register& rn, const Operand& operand) argument
640 Sbc(const Register& rd, const Register& rn, const Operand& operand) argument
648 Sbcs(const Register& rd, const Register& rn, const Operand& operand) argument
672 AddSubWithCarryMacro(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubWithCarryOp op) argument
[all...]
/external/valgrind/main/none/tests/arm/
H A Dv6media.stdout.exp2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3 mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
4 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
5 mul r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
6 mul r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
7 mul r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
9 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
10 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
11 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
12 mla r0, r1, r2, r3 :: rd 0x00000002 rm 0xffffffff, rn
[all...]
H A Dv6intARM.stdout.exp25 adds r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x40000000 Z
26 adds r0, r1, r2 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, carryin 0, cpsr 0x00000000
27 adds r0, r1, r2 :: rd 0x00000001 rm 0x00000001, rn 0x00000000, carryin 0, cpsr 0x00000000
28 adds r0, r1, r2 :: rd 0x00000002 rm 0x00000001, rn 0x00000001, carryin 0, cpsr 0x00000000
29 adds r0, r1, r2 :: rd 0xffffffff rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x80000000 N
30 adds r0, r1, r2 :: rd 0x00000000 rm 0x00000001, rn 0xffffffff, carryin 0, cpsr 0x60000000 ZC
31 adds r0, r1, r2 :: rd 0x80000000 rm 0x7fffffff, rn 0x00000001, carryin 0, cpsr 0x90000000 N V
32 adds r0, r1, r2 :: rd 0x7fffffff rm 0x80000000, rn 0xffffffff, carryin 0, cpsr 0x30000000 CV
33 adds r0, r1, r2 :: rd 0x80000000 rm 0x80000000, rn 0x00000000, carryin 0, cpsr 0x80000000 N
35 adcs r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn
[all...]
/external/chromium_org/v8/src/arm64/
H A Dmacro-assembler-arm64-inl.h47 const Register& rn,
51 LogicalMacro(rd, rn, operand, AND);
56 const Register& rn,
60 LogicalMacro(rd, rn, operand, ANDS);
64 void MacroAssembler::Tst(const Register& rn, argument
67 LogicalMacro(AppropriateZeroRegFor(rn), rn, operand, ANDS); local
72 const Register& rn,
76 LogicalMacro(rd, rn, operand, BIC);
81 const Register& rn,
46 And(const Register& rd, const Register& rn, const Operand& operand) argument
55 Ands(const Register& rd, const Register& rn, const Operand& operand) argument
71 Bic(const Register& rd, const Register& rn, const Operand& operand) argument
80 Bics(const Register& rd, const Register& rn, const Operand& operand) argument
89 Orr(const Register& rd, const Register& rn, const Operand& operand) argument
98 Orn(const Register& rd, const Register& rn, const Operand& operand) argument
107 Eor(const Register& rd, const Register& rn, const Operand& operand) argument
116 Eon(const Register& rd, const Register& rn, const Operand& operand) argument
125 Ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
138 Ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
151 Add(const Register& rd, const Register& rn, const Operand& operand) argument
163 Adds(const Register& rd, const Register& rn, const Operand& operand) argument
176 Sub(const Register& rd, const Register& rn, const Operand& operand) argument
189 Subs(const Register& rd, const Register& rn, const Operand& operand) argument
202 Cmn(const Register& rn, const Operand& operand) argument
204 Adds(AppropriateZeroRegFor(rn), rn, operand); local
208 Cmp(const Register& rn, const Operand& operand) argument
210 Subs(AppropriateZeroRegFor(rn), rn, operand); local
233 Adc(const Register& rd, const Register& rn, const Operand& operand) argument
242 Adcs(const Register& rd, const Register& rn, const Operand& operand) argument
251 Sbc(const Register& rd, const Register& rn, const Operand& operand) argument
260 Sbcs(const Register& rd, const Register& rn, const Operand& operand) argument
313 Asr(const Register& rd, const Register& rn, unsigned shift) argument
322 Asr(const Register& rd, const Register& rn, const Register& rm) argument
343 Bfi(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
353 Bfxil(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
395 Cinc(const Register& rd, const Register& rn, Condition cond) argument
405 Cinv(const Register& rd, const Register& rn, Condition cond) argument
415 Cls(const Register& rd, const Register& rn) argument
422 Clz(const Register& rd, const Register& rn) argument
429 Cneg(const Register& rd, const Register& rn, Condition cond) argument
452 CmovX(const Register& rd, const Register& rn, Condition cond) argument
481 Csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
492 Csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
503 Csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
532 Extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument
716 Fmov(FPRegister fd, Register rn) argument
888 Lsl(const Register& rd, const Register& rn, unsigned shift) argument
897 Lsl(const Register& rd, const Register& rn, const Register& rm) argument
906 Lsr(const Register& rd, const Register& rn, unsigned shift) argument
915 Lsr(const Register& rd, const Register& rn, const Register& rm) argument
924 Madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
934 Mneg(const Register& rd, const Register& rn, const Register& rm) argument
943 Mov(const Register& rd, const Register& rn) argument
975 Msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
985 Mul(const Register& rd, const Register& rn, const Register& rm) argument
994 Rbit(const Register& rd, const Register& rn) argument
1009 Rev(const Register& rd, const Register& rn) argument
1016 Rev16(const Register& rd, const Register& rn) argument
1023 Rev32(const Register& rd, const Register& rn) argument
1039 Ror(const Register& rd, const Register& rn, const Register& rm) argument
1048 Sbfiz(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
1058 Sbfx(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
1068 Scvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
1076 Sdiv(const Register& rd, const Register& rn, const Register& rm) argument
1085 Smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1095 Smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1105 Smull(const Register& rd, const Register& rn, const Register& rm) argument
1114 Smulh(const Register& rd, const Register& rn, const Register& rm) argument
1131 Sxtb(const Register& rd, const Register& rn) argument
1138 Sxth(const Register& rd, const Register& rn) argument
1145 Sxtw(const Register& rd, const Register& rn) argument
1152 Ubfiz(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
1162 Ubfx(const Register& rd, const Register& rn, unsigned lsb, unsigned width) argument
1172 Ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
1180 Udiv(const Register& rd, const Register& rn, const Register& rm) argument
1189 Umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1199 Umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1209 Uxtb(const Register& rd, const Register& rn) argument
1216 Uxth(const Register& rd, const Register& rn) argument
1223 Uxtw(const Register& rd, const Register& rn) argument
[all...]
H A Dassembler-arm64.h1087 const Register& rn,
1092 const Register& rn,
1096 void cmn(const Register& rn, const Operand& operand);
1100 const Register& rn,
1105 const Register& rn,
1109 void cmp(const Register& rn, const Operand& operand);
1121 const Register& rn,
1126 const Register& rn,
1131 const Register& rn,
1136 const Register& rn,
[all...]
H A Dassembler-arm64.cc1085 const Register& rn,
1087 AddSub(rd, rn, operand, LeaveFlags, ADD);
1092 const Register& rn,
1094 AddSub(rd, rn, operand, SetFlags, ADD);
1098 void Assembler::cmn(const Register& rn, argument
1100 Register zr = AppropriateZeroRegFor(rn);
1101 adds(zr, rn, operand);
1106 const Register& rn,
1108 AddSub(rd, rn, operand, LeaveFlags, SUB);
1113 const Register& rn,
1084 add(const Register& rd, const Register& rn, const Operand& operand) argument
1091 adds(const Register& rd, const Register& rn, const Operand& operand) argument
1105 sub(const Register& rd, const Register& rn, const Operand& operand) argument
1112 subs(const Register& rd, const Register& rn, const Operand& operand) argument
1119 cmp(const Register& rn, const Operand& operand) argument
1137 adc(const Register& rd, const Register& rn, const Operand& operand) argument
1144 adcs(const Register& rd, const Register& rn, const Operand& operand) argument
1151 sbc(const Register& rd, const Register& rn, const Operand& operand) argument
1158 sbcs(const Register& rd, const Register& rn, const Operand& operand) argument
1178 and_(const Register& rd, const Register& rn, const Operand& operand) argument
1185 ands(const Register& rd, const Register& rn, const Operand& operand) argument
1192 tst(const Register& rn, const Operand& operand) argument
1194 ands(AppropriateZeroRegFor(rn), rn, operand); local
1198 bic(const Register& rd, const Register& rn, const Operand& operand) argument
1205 bics(const Register& rd, const Register& rn, const Operand& operand) argument
1212 orr(const Register& rd, const Register& rn, const Operand& operand) argument
1219 orn(const Register& rd, const Register& rn, const Operand& operand) argument
1226 eor(const Register& rd, const Register& rn, const Operand& operand) argument
1233 eon(const Register& rd, const Register& rn, const Operand& operand) argument
1240 lslv(const Register& rd, const Register& rn, const Register& rm) argument
1249 lsrv(const Register& rd, const Register& rn, const Register& rm) argument
1258 asrv(const Register& rd, const Register& rn, const Register& rm) argument
1267 rorv(const Register& rd, const Register& rn, const Register& rm) argument
1277 bfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
1290 sbfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
1303 ubfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
1316 extr(const Register& rd, const Register& rn, const Register& rm, unsigned lsb) argument
1328 csel(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
1336 csinc(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
1344 csinv(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
1352 csneg(const Register& rd, const Register& rn, const Register& rm, Condition cond) argument
1374 cinc(const Register &rd, const Register &rn, Condition cond) argument
1380 cinv(const Register &rd, const Register &rn, Condition cond) argument
1386 cneg(const Register &rd, const Register &rn, Condition cond) argument
1392 ConditionalSelect(const Register& rd, const Register& rn, const Register& rm, Condition cond, ConditionalSelectOp op) argument
1403 ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
1411 ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument
1419 DataProcessing3Source(const Register& rd, const Register& rn, const Register& rm, const Register& ra, DataProcessing3SourceOp op) argument
1428 mul(const Register& rd, const Register& rn, const Register& rm) argument
1437 madd(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1446 mneg(const Register& rd, const Register& rn, const Register& rm) argument
1455 msub(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1464 smaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1474 smsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1484 umaddl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1494 umsubl(const Register& rd, const Register& rn, const Register& rm, const Register& ra) argument
1504 smull(const Register& rd, const Register& rn, const Register& rm) argument
1513 smulh(const Register& rd, const Register& rn, const Register& rm) argument
1521 sdiv(const Register& rd, const Register& rn, const Register& rm) argument
1530 udiv(const Register& rd, const Register& rn, const Register& rm) argument
1539 rbit(const Register& rd, const Register& rn) argument
1545 rev16(const Register& rd, const Register& rn) argument
1551 rev32(const Register& rd, const Register& rn) argument
1558 rev(const Register& rd, const Register& rn) argument
1564 clz(const Register& rd, const Register& rn) argument
1570 cls(const Register& rd, const Register& rn) argument
1796 fmov(FPRegister fd, Register rn) argument
2044 scvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
2056 ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
2149 AddSub(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubOp op) argument
2187 AddSubWithCarry(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, AddSubWithCarryOp op) argument
2257 Logical(const Register& rd, const Register& rn, const Operand& operand, LogicalOp op) argument
2294 LogicalImmediate(const Register& rd, const Register& rn, unsigned n, unsigned imm_s, unsigned imm_r, LogicalOp op) argument
2308 ConditionalCompare(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond, ConditionalCompareOp op) argument
2327 DataProcessing1Source(const Register& rd, const Register& rn, DataProcessing1SourceOp op) argument
2362 EmitShift(const Register& rd, const Register& rn, Shift shift, unsigned shift_amount) argument
2385 EmitExtendShift(const Register& rd, const Register& rn, Extend extend, unsigned left_shift) argument
2422 DataProcShiftedRegister(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, Instr op) argument
2436 DataProcExtendedRegister(const Register& rd, const Register& rn, const Operand& operand, FlagsUpdate S, Instr op) argument
[all...]
H A Dmacro-assembler-arm64.h141 const Register& rn,
144 const Register& rn,
147 const Register& rn,
150 const Register& rn,
153 const Register& rn,
156 const Register& rn,
159 const Register& rn,
162 const Register& rn,
164 inline void Tst(const Register& rn, const Operand& operand);
166 const Register& rn,
[all...]
/external/ipsec-tools/src/racoon/samples/roadwarrior/client/
H A Dphase1-down.sh11 DEFAULT_GW=`netstat -rn | awk '($1 == "default"){print $2}'`
14 DEFAULT_GW=`netstat -rn | awk '($1 == "0.0.0.0"){print $2}'`
34 if=`netstat -rn|awk '($1 == "default"){print $7}'`
41 if=`netstat -rn|awk '($1 == "0.0.0.0"){print $8}'`
H A Dphase1-up.sh10 DEFAULT_GW=`netstat -rn | awk '($1 == "default"){print $2}'`
13 DEFAULT_GW=`netstat -rn | awk '($1 == "0.0.0.0"){print $2}'`
35 if=`netstat -rn|awk '($1 == "default"){print $7}'`
42 if=`netstat -rn|awk '($1 == "0.0.0.0"){print $8}'`
/external/linux-tools-perf/perf-3.12.0/tools/perf/arch/powerpc/util/
H A Dheader.c12 #define mfspr(rn) ({unsigned long rval; \
13 asm volatile("mfspr %0," __stringify(rn) \
/external/chromium_org/v8/src/arm/
H A Ddisasm-arm.cc303 if (format[1] == 'n') { // 'rn: Rn register
713 Format(instr, "mul'cond's 'rn, 'rm, 'rs");
720 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
726 Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
736 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
746 Format(instr, "'memop'cond's 'rd, ['rn], -'rm");
748 Format(instr, "'memop'cond's 'rd, ['rn], #-'off8");
754 Format(instr, "'memop'cond's 'rd, ['rn], +'rm");
756 Format(instr, "'memop'cond's 'rd, ['rn], #+'off8");
762 Format(instr, "'memop'cond's 'rd, ['rn,
[all...]
/external/qemu/util/
H A Dhost-utils.c45 LL rl, rm, rn, rh, a0, b0; local
53 rn.ll = (uint64_t)a0.l.high * b0.l.low;
56 c = (uint64_t)rl.l.high + rm.l.low + rn.l.low;
59 c = c + rm.l.high + rn.l.high + rh.l.low;
/external/openssl/crypto/lhash/
H A Dlhash.c182 LHASH_NODE *nn,**rn; local
189 rn=getrn(lh,data,&hash);
191 if (*rn == NULL)
203 *rn=nn;
210 ret= (*rn)->data;
211 (*rn)->data=data;
220 LHASH_NODE *nn,**rn; local
224 rn=getrn(lh,data,&hash);
226 if (*rn == NULL)
233 nn= *rn;
251 LHASH_NODE **rn; local
[all...]
/external/qemu/target-mips/
H A Dtranslate.c2907 const char * __attribute__((unused)) rn = "invalid"; local
2917 rn = "Index";
2922 rn = "MVPControl";
2927 rn = "MVPConf0";
2932 rn = "MVPConf1";
2942 rn = "Random";
2947 rn = "VPEControl";
2952 rn = "VPEConf0";
2957 rn = "VPEConf1";
2962 rn
3484 const char * __attribute__((unused)) rn = "invalid"; local
4080 const char *rn = "invalid"; local
4646 const char *rn = "invalid"; local
[all...]
/external/jemalloc/test/include/test/
H A Dmath.h56 double acu, factor, oflo, gin, term, rn, a, b, an, dif; local
75 rn = p;
78 rn += 1.0;
79 term *= x / rn;
105 rn = pn[4] / pn[5];
106 dif = fabs(gin - rn);
107 if (dif <= acu && dif <= acu * rn) {
111 gin = rn;
/external/qemu/target-arm/
H A Dtranslate.c1175 static inline void gen_op_iwmmxt_movq_wRn_M0(int rn) argument
1177 iwmmxt_store_reg(cpu_M0, rn);
1180 static inline void gen_op_iwmmxt_movq_M0_wRn(int rn) argument
1182 iwmmxt_load_reg(cpu_M0, rn);
1185 static inline void gen_op_iwmmxt_orq_M0_wRn(int rn) argument
1187 iwmmxt_load_reg(cpu_V1, rn);
1191 static inline void gen_op_iwmmxt_andq_M0_wRn(int rn) argument
1193 iwmmxt_load_reg(cpu_V1, rn);
1197 static inline void gen_op_iwmmxt_xorq_M0_wRn(int rn) argument
1199 iwmmxt_load_reg(cpu_V1, rn);
1308 gen_op_iwmmxt_addl_M0_wRn(int rn) argument
2753 uint32_t rd, rn, rm, op, i, n, offset, delta_d, delta_m, bank_mask; local
3905 int rd, rn, rm; local
4496 int rd, rn, rm; local
6575 unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh; local
7932 uint32_t rd, rn, rm, rs; local
9001 uint32_t val, insn, op, rm, rn, rd, shift, cond; local
[all...]
/external/chromium_org/third_party/icu/source/i18n/
H A Duspoof_wsconf.cpp319 for (int32_t rn=0; rn<ignoreSet.getRangeCount(); rn++) {
320 UChar32 rangeStart = ignoreSet.getRangeStart(rn);
321 UChar32 rangeEnd = ignoreSet.getRangeEnd(rn);

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