Searched refs:set_reg (Results 1 - 11 of 11) sorted by relevance

/external/qemu/include/exec/
H A Dgdbstub.h32 gdb_reg_cb get_reg, gdb_reg_cb set_reg,
/external/libunwind/src/dwarf/
H A DGparser.c51 set_reg (dwarf_state_record_t *sr, unw_word_t regnum, dwarf_where_t where, function
154 set_reg (sr, regnum, DWARF_WHERE_CFAREL, val * dci->data_align);
163 set_reg (sr, regnum, DWARF_WHERE_CFAREL, val * dci->data_align);
172 set_reg (sr, regnum, DWARF_WHERE_CFAREL, val * dci->data_align);
219 set_reg (sr, regnum, DWARF_WHERE_UNDEF, 0);
226 set_reg (sr, regnum, DWARF_WHERE_SAME, 0);
234 set_reg (sr, regnum, DWARF_WHERE_REG, val);
271 set_reg (sr, DWARF_CFA_REG_COLUMN, DWARF_WHERE_REG, regnum);
272 set_reg (sr, DWARF_CFA_OFF_COLUMN, 0, val); /* NOT factored! */
280 set_reg (s
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/external/vixl/src/a64/
H A Dsimulator-a64.h253 inline void set_reg(unsigned size, unsigned code, T value,
266 // Like set_reg(), but infer the access size from the template type.
268 inline void set_reg(unsigned code, T value,
270 set_reg(sizeof(value) * 8, code, value, r31mode);
273 // Common specialized accessors for the set_reg() template.
276 set_reg(kWRegSize, code, value, r31mode);
281 set_reg(kXRegSize, code, value, r31mode);
287 set_reg(kLinkRegCode, value);
292 set_reg(31, value, Reg31IsStackPointer);
H A Dsimulator-a64.cc508 set_reg(kXRegSize,
615 set_reg(reg_size, instr->Rd(), new_val, instr->RdMode());
660 set_reg(reg_size, instr->Rd(), new_val);
706 set_reg(reg_size, instr->Rd(), result, instr->RdMode());
1076 set_reg(reg_size, instr->Rd(), new_val);
1217 set_reg(reg_size, instr->Rd(), result);
1270 set_reg(reg_size, instr->Rd(), result);
1323 set_reg(reg_size, instr->Rd(), result);
1331 set_reg(reg_size,
/external/libunwind/src/ia64/
H A DGparser.c155 set_reg (struct ia64_reg_info *reg, enum ia64_where where, int when, function
299 set_reg (sr->curr.reg + unw.save_order[i], IA64_WHERE_GR,
328 set_reg (sr->curr.reg + IA64_REG_B1 + i, IA64_WHERE_GR,
343 set_reg (sr->curr.reg + IA64_REG_B1 + i, IA64_WHERE_SPILL_HOME,
361 set_reg (sr->curr.reg + IA64_REG_R4 + i, IA64_WHERE_SPILL_HOME,
372 set_reg (sr->curr.reg + base + i, IA64_WHERE_SPILL_HOME,
389 set_reg (sr->curr.reg + IA64_REG_F2 + i, IA64_WHERE_SPILL_HOME,
406 set_reg (sr->curr.reg + IA64_REG_R4 + i, IA64_WHERE_GR,
421 set_reg (sr->curr.reg + IA64_REG_R4 + i, IA64_WHERE_SPILL_HOME,
432 set_reg (s
[all...]
/external/chromium_org/v8/src/arm64/
H A Dsimulator-arm64.h353 void set_reg(unsigned code, T value,
359 // Common specialized accessors for the set_reg() template.
362 set_reg(code, value, r31mode);
367 set_reg(code, value, r31mode);
394 set_reg(kLinkRegCode, value);
400 set_reg(31, value, Reg31IsStackPointer);
H A Dsimulator-arm64.cc887 set_reg<T>(instr->Rd(), new_val);
961 set_reg<T>(instr->Rd(), result);
1280 set_reg(instr->Rd(), instr->ImmPCOffsetTarget());
1389 set_reg<T>(instr->Rd(), new_val, instr->RdMode());
1489 set_reg<T>(instr->Rd(), result, instr->RdMode());
1850 set_reg(addr_reg, address + offset, Reg31IsStackPointer);
2058 set_reg<T>(instr->Rd(), result);
2179 set_reg<T>(instr->Rd(), result);
/external/chromium_org/tools/traceline/traceline/
H A Dassembler.h192 void set_reg(Register reg) {
304 // Mutable because reg in ModR/M byte is set by Assembler via set_reg().
346 operand.set_reg(reg);
/external/libunwind/include/
H A Dlibunwind-common.h.in220 #define unw_set_reg UNW_OBJ(set_reg)
H A Dlibunwind-common.h242 #define unw_set_reg UNW_OBJ(set_reg)
/external/qemu/
H A Dgdbstub.c263 gdb_reg_cb set_reg; member in struct:GDBRegisterState
1410 return r->set_reg(env, mem_buf, reg - r->base_reg);
1419 gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1423 gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1434 s->set_reg = set_reg;
1422 gdb_register_coprocessor(CPUState *cpu, gdb_reg_cb get_reg, gdb_reg_cb set_reg, int num_regs, const char *xml, int g_pos) argument

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