| /external/llvm/test/MC/Mips/ |
| H A D | micromips-shift-instructions.s | 11 # CHECK-EL: sllv $2, $3, $5 # encoding: [0x65,0x00,0x10,0x10]
22 # CHECK-EB: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
30 sllv $2, $3, $5
|
| H A D | mips-alu-instructions.s | 22 # CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
53 sllv $2, $3, $5
|
| H A D | mips64-alu-instructions.s | 20 # CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
48 sllv $2, $3, $5
|
| /external/llvm/test/MC/Mips/mips1/ |
| H A D | valid.s | 83 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
84 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/chromium_org/v8/test/cctest/ |
| H A D | test-disasm-mips.cc | 310 COMPARE(sllv(a0, a1, a2),
311 "00c52004 sllv a0, a1, a2");
312 COMPARE(sllv(s0, s1, s2),
313 "02518004 sllv s0, s1, s2");
314 COMPARE(sllv(t2, t3, t4),
315 "018b5004 sllv t2, t3, t4");
316 COMPARE(sllv(v0, v1, fp),
317 "03c31004 sllv v0, v1, fp");
|
| H A D | test-disasm-mips64.cc | 407 COMPARE(sllv(a0, a1, a2),
408 "00c52004 sllv a0, a1, a2");
409 COMPARE(sllv(s0, s1, s2),
410 "02518004 sllv s0, s1, s2");
411 COMPARE(sllv(a6, a7, t0),
412 "018b5004 sllv a6, a7, t0");
413 COMPARE(sllv(v0, v1, fp),
414 "03c31004 sllv v0, v1, fp");
|
| H A D | test-assembler-mips.cc | 146 __ sllv(v0, v0, t0); // 0xf2345600
|
| H A D | test-assembler-mips64.cc | 148 __ sllv(v0, v0, a4); // 0xf2345600
|
| /external/llvm/test/MC/Mips/mips2/ |
| H A D | valid.s | 97 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
98 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/mips32/ |
| H A D | valid.s | 125 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
126 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| H A D | valid.s | 153 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
154 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/mips3/ |
| H A D | valid.s | 155 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
156 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/mips4/ |
| H A D | valid.s | 173 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
174 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/mips5/ |
| H A D | valid.s | 174 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
175 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/mips64/ |
| H A D | valid.s | 190 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
191 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| H A D | valid.s | 217 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
218 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/chromium_org/v8/src/mips64/ |
| H A D | disasm-mips64.cc | 724 Format(instr, "sllv 'rd, 'rt, 'rs");
|
| H A D | assembler-mips64.h | 796 void sllv(Register rd, Register rt, Register rs);
|
| H A D | code-stubs-mips64.cc | 237 __ sllv(input_high, input_high, scratch);
249 __ sllv(input_low, input_low, scratch);
|
| H A D | assembler-mips64.cc | 1674 void Assembler::sllv(Register rd, Register rt, Register rs) { function in class:v8::Assembler
|
| /external/linux-tools-perf/perf-3.12.0/arch/mips/lib/ |
| H A D | memcpy.S | 150 #define SLLV sllv
|
| /external/chromium_org/v8/src/mips/ |
| H A D | assembler-mips.h | 784 void sllv(Register rd, Register rt, Register rs);
|
| H A D | code-stubs-mips.cc | 241 __ sllv(input_high, input_high, scratch);
253 __ sllv(input_low, input_low, scratch);
2270 __ sllv(t1, t0, a3);
2272 __ sllv(t1, a1, a3);
2277 __ sllv(t1, t2, a3);
|
| H A D | macro-assembler-mips.cc | 938 sllv(at, rs, at);
5706 sllv(mask_reg, t8, mask_reg);
|
| H A D | assembler-mips.cc | 1610 void Assembler::sllv(Register rd, Register rt, Register rs) { function in class:v8::Assembler
|