Searched refs:swtcl (Results 1 - 22 of 22) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/
H A Dradeon_swtcl.c69 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = (ATTR); \
70 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = (STYLE); \
71 rmesa->radeon.swtcl.vertex_attr_count++; \
77 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = 0; \
78 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = EMIT_PAD; \
79 rmesa->radeon.swtcl
[all...]
H A Dradeon_dma.c430 radeon_bo_unmap(rmesa->swtcl.bo);
436 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
444 rmesa->swtcl.numverts = 0;
446 radeon_bo_unref(rmesa->swtcl.bo);
447 rmesa->swtcl.bo = NULL;
476 ASSERT( vsize == rmesa->swtcl.vertex_size * 4 );
479 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
482 if (!rmesa->swtcl
[all...]
H A Dradeon_tcl.c459 rmesa->swtcl.vertex_format = 0;
506 rmesa->swtcl.vertex_format = 0;
508 // if (rmesa->swtcl.indexed_verts.buf)
509 // radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts,
H A Dradeon_context.h374 * Offset of the 4UB color data within a hardware (swtcl) vertex.
379 * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
427 struct r100_swtcl_info swtcl; member in struct:r100_context
H A Dradeon_common_context.h423 struct radeon_swtcl_info swtcl; member in struct:radeon_context
H A Dradeon_context.c251 rmesa->radeon.swtcl.RenderIndex = ~0;
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_swtcl.c69 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = (ATTR); \
70 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = (STYLE); \
71 rmesa->radeon.swtcl.vertex_attr_count++; \
77 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = 0; \
78 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = EMIT_PAD; \
79 rmesa->radeon.swtcl
[all...]
H A Dradeon_dma.c430 radeon_bo_unmap(rmesa->swtcl.bo);
436 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
444 rmesa->swtcl.numverts = 0;
446 radeon_bo_unref(rmesa->swtcl.bo);
447 rmesa->swtcl.bo = NULL;
476 ASSERT( vsize == rmesa->swtcl.vertex_size * 4 );
479 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
482 if (!rmesa->swtcl
[all...]
H A Dradeon_tcl.c459 rmesa->swtcl.vertex_format = 0;
506 rmesa->swtcl.vertex_format = 0;
508 // if (rmesa->swtcl.indexed_verts.buf)
509 // radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts,
H A Dradeon_context.h374 * Offset of the 4UB color data within a hardware (swtcl) vertex.
379 * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
427 struct r100_swtcl_info swtcl; member in struct:r100_context
H A Dradeon_common_context.h423 struct radeon_swtcl_info swtcl; member in struct:radeon_context
H A Dradeon_context.c251 rmesa->radeon.swtcl.RenderIndex = ~0;
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
H A Dr200_swtcl.c64 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = (ATTR); \
65 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = (STYLE); \
66 rmesa->radeon.swtcl.vertex_attr_count++; \
72 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = 0; \
73 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = EMIT_PAD; \
74 rmesa->radeon.swtcl
[all...]
H A Dradeon_dma.c430 radeon_bo_unmap(rmesa->swtcl.bo);
436 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
444 rmesa->swtcl.numverts = 0;
446 radeon_bo_unref(rmesa->swtcl.bo);
447 rmesa->swtcl.bo = NULL;
476 ASSERT( vsize == rmesa->swtcl.vertex_size * 4 );
479 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
482 if (!rmesa->swtcl
[all...]
H A Dr200_context.h552 * Offset of the 4UB color data within a hardware (swtcl) vertex.
557 * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
618 struct r200_swtcl_info swtcl; member in struct:r200_context
H A Dradeon_common_context.h423 struct radeon_swtcl_info swtcl; member in struct:radeon_context
H A Dr200_context.c289 rmesa->radeon.swtcl.RenderIndex = ~0;
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dr200_swtcl.c64 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = (ATTR); \
65 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = (STYLE); \
66 rmesa->radeon.swtcl.vertex_attr_count++; \
72 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = 0; \
73 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = EMIT_PAD; \
74 rmesa->radeon.swtcl
[all...]
H A Dradeon_dma.c430 radeon_bo_unmap(rmesa->swtcl.bo);
436 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
444 rmesa->swtcl.numverts = 0;
446 radeon_bo_unref(rmesa->swtcl.bo);
447 rmesa->swtcl.bo = NULL;
476 ASSERT( vsize == rmesa->swtcl.vertex_size * 4 );
479 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
482 if (!rmesa->swtcl
[all...]
H A Dr200_context.h552 * Offset of the 4UB color data within a hardware (swtcl) vertex.
557 * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
618 struct r200_swtcl_info swtcl; member in struct:r200_context
H A Dradeon_common_context.h423 struct radeon_swtcl_info swtcl; member in struct:radeon_context
H A Dr200_context.c289 rmesa->radeon.swtcl.RenderIndex = ~0;

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